Datasheet

FTLD10CE1C Product Specification – August 2011 F i n i s a r
Finisar Corporation – 3-Aug-11 Rev B2 Page 6
IV. Electrical Characteristics (T
OP
= 0 to 70 C, V
CC
= 3.3 ± 5% Volts)
NOTE: The FTLD10CE1C requires that a CPPI-compliant CXP electrical connector be used on the host
board in order to guarantee its electrical interface specification. Please check with your connector supplier.
Parameter
Symbol
Min
Typ
Max
Unit
Ref.
Supply Voltage
Vcc1,
VccTx,
VccRx
3.15
3.45
V
Supply Current
Icc
850
1000
mA
Module Total Power
P
3.5
W
1
Link Turn-On Time
Transmit turn-on time
2000
ms
2
Transmitter (per Lane)
Single ended input voltage tolerance
VinT
-0.3
4.0
V
Differential data input swing
Vin,pp
120
1200
mVpp
3
Differential input threshold
50
mV
AC common mode input voltage tolerance
(RMS)
15
mV
Differential input return loss
Per IEEE 802.3ba,
Section 86A.4.1.1
dB
4
J2 Jitter Tolerance
Jt2
0.17
UI
J9 Jitter Tolerance
Jt9
0.29
UI
Data Dependent Pulse Width Shrinkage
DDPWS
0.07
UI
Eye mask coordinates {X1, X2
Y1, Y2}
0.11, 0.31
95, 350
UI
mV
5
Receiver (per Lane)
Single-ended output voltage
-0.3
4.0
V
Differential data output swing
Vout,pp
0
800
mVpp
6,7
AC common mode output voltage (RMS)
7.5
mV
Termination mismatch at 1 MHx
5
%
Differential output return loss
Per IEEE 802.3ba,
Section 86A.4.2.1
dB
4
Common mode output return loss
Per IEEE 802.3ba,
Section 86A.4.2.2
dB
4
Output transition time, 20% to 80%
28
ps
J2 Jitter output
Jo2
0.42
UI
J9 Jitter output
Jo9
0.65
UI
Eye mask coordinates {X1, X2
Y1, Y2}
0.29, 0.5
150, 425
UI
mV
5
Power Supply Ripple Tolerance
PSR
50
mVpp
Notes:
1. Maximum total power value is specified across the full temperature and voltage range.
2. From power-on and end of any fault conditions.
3. After internal AC coupling. Self-biasing 100 differential input.
4. 10 MHz to 11.1 GHz range
5. Hit ratio = 5 x 10E-5
6. AC coupled with 100 differential output impedance.
7. Settable in 4 discrete steps via the I2C interface. See Figure 2 for Vout settings.