User Guide

Hardware Functional Overview
FIC MD02 Service Manual 4-7
dynamic switching between multiple voltage and frequency points instead of two points
supported on previous versions of Intel SpeedStep technology. This results in optimal
performance without compromising low power. The processor features the Auto Halt, Stop-
Grant, Deep Sleep, and Deeper Sleep low power states.
The Intel Pentium M processor utilizes socketable Micro Flip-Chip Pin Grid Array (Micro-
FCPGA) and surface mount Micro Flip-Chip Ball Grid Array (Micro-FCBGA) package
technology. The Micro-FCPGA package plugs into a 479-hole, surface-mount, Zero
Insertion Force (ZIF) socket, which is referred to as the mPGA479M socket.
This document includes specifications for the Intel Pentium M processor at Highest
Frequency Mode (HFM) core frequencies of 1.30, 1.40, 1.50, and 1.60 GHz, the Low
Voltage Intel Pentium M processor at HFM core frequency of 1.10 GHz and the Ultra Low
Voltage Intel Pentium M processor at HFM core frequency of 900 MHz.
4.5 System Core Logic
4.5.1 Intel 855GM Chipset GMCH Features
Processor/Host Bus Support
Ø . Intel® Pentium® M processor
Ø . 2x address, 4x data
Ø . Supports system bus at 400 MHz
Ø . Supports Host bus dynamic bus inversion (DBI)
Ø . Supports 64-bit host bus addressing
Ø . 12-deep in-order queue
Ø . AGTL+ bus driver technology with integrated AGTL+ termination resistors and low
voltage operation (Vtt = 1.05 V)
Ø . Supports Enhanced Intel® SpeedStep® technology
Ø . Support for DPWR# signal to Intel Pentium M processor for PSB power anagement
Memory System
Ø . Directly supports one DDR SDRAM channel, 64-bits wide (72-bits with ECC)
Ø . Supports 200/266-MHz DDR SDRAM devices with max of two, double-sided SO-
DIMMs (four rows populated) with unbuffered PC1600/PC2100 DDR SDRAM.
Ø . Supports 128-Mbit, 256-Mbit, and 512-Mbit technologies providing maximum
capacity of 1 GB with x16 devices and up to 2-GB with high density 512-Mbit
technology
Ø . All supported devices have four banks
Ø . Supports up to 16 simultaneous open pages
Ø . Supports page sizes of 2-kB, 4-kB, 8-kB, and 16-kB. Page size is individually
selected for every row
Ø . UMA support only
System Interrupts
Ø . Supports Intel 8259 and processor system bus interrupt delivery mechanism
Ø . Supports interrupts signaled as upstream memory writes from PCI and Hub
interface
Ø . MSI sent to the CPU through the system bus
Ø . IOxAPIC in ICH4-M provides redirection for upstream interrupts to the system bus
Video Stream Decoder
Ø . Improved hardware motion compensation for MPEG2
Ø . All format decoder (18 ATSC formats) supported
Ø . Dynamic Bob and Weave support for video streams
Ø . Software DVD at 60 Fields/second and 30 frames/second full screen
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