User Guide

FIC MB05W Service Manual
FIC MB05 Service Manual 1-65
Register Bit Number
Functio
n
Add
ress
Name
R/W
7 6 5 4 3 2 1 0
Logic
Defa
ult
Description
ACh
*5
WAKE_
EVT_ST
S
R/W
2 T O 2 1
detection
Write
0:Clear
event
1:Ignore
0x00
ALRT=1
:
GPIO
=1 :
BATn=1 :
ADP
=1 :
TH
=1 :
HIGH=1 :
LOW
=1 :
ERR
=1 :
event is
detected.
SMBAlert
is
detected.
GPIO
event is
detected.
Battery
event is
detected.
Battery
event is
detected.
Thermal
event is
detected
High
alarm
point is
detected.
Low
alarm
point is
detected.
Polling
communi
cation
failure
with retry.
ADh
*5
RUN_
EVT_ST
S_2
R/W Reserved [7:1]
T
H
0x00
AEh
*5
WAKE
EVT_ST
S_2
R/W Reserved [7:1]
T
H
0x00
AFh
*5
THERMA
L_EVT_S
TS
R/W
Reserved
[7:3]
E
R
R
L
O
W
H
I
G
H
0x00
To clear the notified
event flag without
une
xpected event
loss, clear the
corresponding bit
flag only.
For this operation,
this register has
special writing
manner as follows.
STS_X ß
(STS_X) AND
(Written data)
B0h
EC_RUN
_
ENB
R/W
0: Disable
1: Enable
0x00
Event/
GPIO
Control
B1h
EC_WAK
E_
ENB
R/W
B
T
P
2
S
M
B
A
L
R
T
RES[4:1]
A
D
P
0: Disable
1: Enable
0x00
BTP2
:
SMB
:
ALRT
:
ADP:
BTP2 event
SMBus
event.
SMBAlert
event.
Adapter
event.
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