User Guide

FIC CONFIDENTIAL AND PROPRIETARY
MB02 Functional Specifications Rev. 0.3 Page 5
FIC H/W
FIC CONFIDENTIAL AND PROPRIETARY 11-November-2002_
6.8 INTEL MONTARA-GM GMCH INTEGRATED GRAPHIC REGISTERS SUMMARY(DEVICE 2, FUNCTION
0) 37
6.9 INTEL ICH4-M LAN CONTROLLER REGISTERS SUMMARY(BUS 1, DEVICE 8, FUNCTION 0)...........38
6.10 INTEL ICH4-M HUB INTERFACE TO PCI BRIDGE REGISTERS SUMMARY(DEVICE 30, FUNCTION 0)39
6.11 ICH4-M LPC(DEVICE 31:FUNCTION 0) REGISTER...................................................................40
6.12 ICH4-M RTC REGISTERS...............................................................................................................41
6.13 INTEL ICH4-M POWER MANAGEMENT REGISTERS SUMMARY(DEVICE 31, FUNCTION 0) ..............42
6.14 ICH4-M ACPI CONFIGURATION REGISTERS .............................................................................42
6.15 ICH4-M SYSTEM MANAGEMENT TCO REGISTERS..................................................................43
6.16 CH4-M GENERAL PURPOSE IO CONFIGURATION REGISTERS ...............................................43
6.17 ICH4-M IDE CONFIGURATION SPACE(DEVICE 31:FUNCTION 1) REGISTER.......................44
6.17.1 IDE Interface .........................................................................................................................44
6.17.2 PCI Bus Master IDE I/O Register..........................................................................................45
6.18 ICH4-M USB CONTROLLERS CONFIGURATION REGISTERS(DEVICE 29:FUNCTION 0,1,2)45
6.19 ICH4-M USB I/O REGISTER..............................................................................................................46
6.20 ICH4-M USB EHCI COTROLLER REGISTER (DEVICE 29:FUNCTION 7)..............................46
6.21 ICH4-M USB ENHANCED HOST CONTROLLER CAPABILITY REGISTER..........................................47
6.22 ICH4-M USB ENHANCED HOST CONTROLLER OPERATIONAL REGISTER......................................47
6.23 ICH4-M SMBUS COTROLLER REGISTER (DEVICE 31:FUNCTION 3)....................................48
6.24 ICH4-M SMBUS IO REGISTER..........................................................................................................49
6.25 CH4-M AC97 AUDIO COTROLLER REGISTER (DEVICE 31:FUNCTION 5) ............................49
6.26 ICH4-M NATIVE AUDIO BUS MASTER CONTROL IO REGISTER ......................................................50
6.27 CH4-M AC97 MODEM COTROLLER REGISTER (DEVICE 31:FUNCTION 6) .........................51
6.28 ICH4-M AC97 MODEM IO REGISTER ..............................................................................................52
6.29 ICH4-M MODEM IO REGISTER.........................................................................................................52
7 I/O CONFIGURATIONS....................................................................................................................53
7.1 ISA REGISTERS TABLES .......................................................................................................................53
7.2 INTERRUPT ASSIGNMENTS....................................................................................................................55
7.3 I/O MAP ...............................................................................................................................................56
7.4 KEYBOARD CONTROLLER....................................................................................................................58
7.4.1 Mouse INT Mask(IRQ12 Mask)............................................................................................59
7.5 SMBUS I/F ............................................................................................................................................60
7.5.1 SMBus1 Block Diagram........................................................................................................60
7.5.2 SMBus1 Connection Device Address ....................................................................................60
7.5.3 SMBus2 Block Diagram........................................................................................................60
7.5.4 SMBus2 Connectin Device Address ......................................................................................61
7.6 CLOCK CONTROL..................................................................................................................................62
7.6.1 Clock synthesizer/driver ........................................................................................................62
8 SYSTEM MANAGEMENT................................................................................................................65
8.1 GPIO SET REGISTER LIST ....................................................................................................................65
8.1.1 Intel ICH4-M GPIO Configuration........................................................................................65
8.1.2 PMU08 GPIO Configuration .................................................................................................65
8.2 SYSTEM MANAGEMENT GPIO.............................................................................................................66
8.2.1 ICH4-M GPIOs allocation .....................................................................................................66
8.2.2 PMU08 GPIOs allocation ......................................................................................................67
8.2.3 LPC KBC M38859 GPIOs allocation....................................................................................69
9 PCMCIA/CardBus Controller............................................................................................................70
10 Video Controller ..................................................................................................................................71
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