User Guide

Outline of the MB02
1-2 FIC MB02 Service Manual
Cache Memory L1 Cache (Pentium Processor internal):
12KB code and 8KB data
8-way cache associativity provides
L2 Cache (Pentium Processor internal):
256KB Advanced Transfer Cache,8 way associativity
8-way set associative, 32-byte line size, 1 line per
sector
System Memory Expansion Memory: 2 SO-DIMM Slot (1.25”)
Size: 128/256/512MB/1G
Type: DDR DRAM, 3.3V
Data Path: 64Bit
Frequency : 266/200MHz
Please refer to the MB02 Key component list in detail.
BIOS ROM Flash ROM
1
st
Vendor : SST 49LF004A TSSOP Package 4Mbit LPC
flash ROM
2
nd
Vendor : <TBD>
4Mbit, 32 pin TSSOP package
PS: PLCC32 Package is just for DEBUG
Super I/O
None
RTC + NVRAM Integrated in South Bridge (Intel ICH4-M)
Real Time Clock with 256 byte extended
CMOS.
IBM AT Clock/Calendar/Alarm (14 Bytes)
K/B Controller
Mitsubishi M38859 LPC KBC
Internal K/B, Touch Pad, External K/B or M/S
Supported A20Gate,firmware version 2.14
PMU New PMU08
Mitsubishi M38859FFHP
Embedded Controller
TBD
VGA Controller Embedded in Intel Montara-GM
High Performance and high quality 3D
accelerator
Integrated dual DVO bridge
Integrated LVDS Interface
Integrated RGB analog Interface
High performance 2D accelerator
Complete TV-OUT/Digital Flat Panel Solution
VRAM Share system memory, UMA (using DVMT
configuration)
TV out encoder None
CardBus
Controller
RICOH R5C551 (PCI Card Bus controller)
PC/Card Bus Type II x1
Build in smart card (none)
Sound AC’97 CODEC
Realtek ALC202
AC’97 Revision 2.2 Compliant
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