User Guide

Hardware Functional Overview
FIC M785 Service Manual 4-7
Streaming SIMD Extensions 2 (SSE2) Instructions
With the introduction of SSE2, the Intel NetBurst microarchitecture now extends the SIMD
capabilities that MMX technology and SSE technology delivered by adding 144 instructions.
These instructions include 128-bit SIMD integer arithmetic and 128-bit SIMD double-precision
floating-point operations. These instructions reduce the overall number of instructions
required to execute a particular program task and as a result can contribute to an overall
performance increase. They accelerate a broad range of applications, including video, speech,
and image, photo processing, encryption, financial, engineering and scientific applications.
Data Prefetch Logic
Functionality that anticipates the data needed by an application and pre-loads it into the
Advanced Transfer Cache, further increasing processor and application performance.
Features Used for Testing and Performance / Thermal Monitoring
• Built-in Self Test (BIST) provides single stuck-at fault coverage of the microcode and
large logic arrays, as well as testing of the instruction cache, data cache, Translation
Lookaside Buffers (TLBs), and ROMs.
• IEEE 1149.1 Standard Test Access Port and Boundary Scan mechanism enables
testing of the Pentium 4 processor and system connections through a standard
interface.
• Internal performance counters for performance monitoring and event counting.
• Includes a Thermal Monitor feature that allows motherboards to be cost effectively
designed to expected application power usages rather than theoretical maximums.
4.5 System Core Logic
The system core logic function of the notebook is implemented on the CPU module and
motherboard using the SiS650 IGUI HMAC. SiS650 IGUI Host Memory Controller
integrates a high performance host interface for Intel Pentium 4 processor, a high
performance 2D/3D Graphic Engine, a high performance memory controller, an AGP 4X
interface, and SiS MuTIOL Technology connecting w/ SiS962 MuTIOL Media IO. SiS650
Host Interface features the AGTL & AGTL+ compliant bus driver technology with integrated
on-die termination to support Intel Pentium 4 processors. SiS650 provides a 12-level In-
Order-Queue to support maximum outstanding transactions up to 12. It integrated a high
performance 2D/3D Graphic Engine, Video Accelerator and Advanced Hardware
Acceleration MPEGI/MPEGII Video Decoder for the Intel Pentium 4 series based PC
systems. It also integrates a high performance 2.1GB/s DDR266 Memory controller to sustain
t he bandwidth demand from t he integrated GUI or external AGP master, host processor, as
well as the multi I/O masters. In addition to integrated GUI, SiS650 also can support external
AGP slot with AGP 1X/2X/4X capability and Fast Write Transactions. A high bandwidth and
mat ure SiS MuTIOL technology is incorporated to connect SiS650 and SiS962 MuTIOL
Media I/O together. SiS MuTIOL technology is developed into three layers, the Multi-t
hreaded I/O Link Layer delivering 1.2GB bandwidth to connect embedded DMA Master
devices and external PCI masters to interface to Multi-threaded I/O Link layer, the Multi-t
hreaded I/O Link Encoder/Decoder in SiS962 to transfer data w/ 533 MB/s bandwidt h
from/to Multi-threaded I/O Link layer to/from SiS650, and the Multi-t hreaded I/O Link
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