User Guide

Hardware Functional Overview
FIC A985 Service Manual 4-9
− Transparent BitBlt with source and destination keys (16 ROPs)
− Gradient color fill
− Anti-aliasing text drawing
− Alpha blended Bitblt
• Supports memory-mapped, zero wait-state, burst engine write
• Built-in 64x64x2 bit-mapped mono hardware cursor
• Built-in 64x64x16 bit-mapped blended color hardware cursor
• Maximum 64MB frame buffer with linear addressing
Complete TV-OUT/Digital Flat Panel Solution
• Built-in secondary CRT controller for independent secondary CRT, LCD or TV digital
Output
• Cooperates with “SIS650 Video Bridge” to support NTSC/PAL Video Output
• Digital LCD Monitor
• Secondary CRT Monitor
• Supports Dual 12-bit DDR digital interface to TV encoder and LCD transmitter
High Integration
• Built-in 64x128 CRT FIFOs to support ultra high resolution graphics modes and reduce
CPU wait-state
• Built-in programmable 24-bit true-color RAMDAC up to 333 MHz pixel clock
− Built-in reference voltage generator and monitor sense circuit
− Supports downloadable 24 bits RAMDAC for gamma correction in high color and
true color modes
− Support programmable 4 levels DAC current ratio (700, 750, 800, 850 mv)
− Support programmable pedestal level (0, 0.75mv)
− Support programmable 4 levels slew rate control
• Built-in two clock generators
− Integrates PLL loop filter for CRT, 2D, 3D, MPEG and VP Engine
• Built-in two 120x128 video line buffers for MPEG II video playback
• Built-in TV Encoder Interface
Power Management
• Supports VESA Display Power Management Signaling (DPMS) compliant VGA monitor
for power management
• Supports direct I/O command to force graphics controller into standby/suspend/off state
• Power down internal Gamma/Palette SRAM in direct color mode
• Supports PCI power management configuration registers for supporting ACPI power
down controller
• Power down all internal macro cells such as SRAM, DAC, clock generator when power
saving mode
• Supports clock stopping for video accelerator, VP, 2D, 3D and MPEG decoder when
disabled
• Supports auto clock throttling for 2D engine, 3D engine
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