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Hardware Functional Overview

FIC A985 Service Manual 4-1

Chapter

4.1 Overview

The FIC A985 notebook consists of several important functions and subsystems including:

• System Processor – implemented on the motherboard using the Intel uFCPGA

Pentium 4 –M Northwood at 400 MHz Front System Bus speed.

• System North Bridge Core Logic – implemented on the motherboard using the SIS

650 chipset.

- CPU Interface

- AGP BUS Controller

- DDR DRAM Controller

- MuTIOL Media I/O

• System South Bridge Core Logic – implemented on the motherboard using the SIS

961 chipset.

- Integrated MuTIOL Connect to PCI Bridge

- Dual IDE Master/Slave Controller, Integrated DMA

• Clock Frequency Generator – implemented on the motherboard using the ICS 952001

clock generator chip.

• Cache Memory Subsystem – implemented on-die on the Intel CPU.

- L1 cache (Pentium Processor Internal)

- 12KB code and 8KB data, which implemented 8 way set associative and write

back

- L2 cache (Pentium Processor Internal)

- 256KB Advanced Transfer Cache,8 way associativity

- 8-way set associative, 32-byte line size, 1 line per sector

• Video Subsystem – embedded in SIS 650

- High Performance and high quality 3D accelerator

- Integrated VB bridge

- High performance 2D accelerator

- Complete TV-OUT/Digital Flat Panel Solution

• VRAM – embedded in SIS 650

- Share system memory from 8MB up to 64MB

• PCMCIA Subsystem – implemented on the motherboard using the O2Micro OZ6912

PCI-CARDBUS BRIDGE controller chip.

- Support Type II x2 (without door)

• Sound – implemented or integrated in south bridge (SIS 961)

- AC’97 CODEC

- Realtek ALC201

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Summary of content (19 pages)

PAGE 1
Chapter Hardware Functional Overview 4.1 Overview The FIC A985 notebook consists of several important functions and subsystems including: • System Processor – implemented on the motherboard using the Intel uFCPGA Pentium 4 –M Northwood at 400 MHz Front System Bus speed. • System North Bridge Core Logic – implemented on the motherboard using the SIS 650 chipset.
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Hardware Functional Overview • - AC’97 Revision 2.1 Compliant - Supports Consumer IEC958 Output Port (SPDIF OUT) USB and Bluetooth – implemented or integrated in south bridge (SIS 961) - USB v1.1 and Intel Universal HCI v.1.
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Hardware Functional Overview 4.2 System Hardware Block Diagram Figure 4-1 A985 Diagram FIC A985 Service Manual PDF created with FinePrint pdfFactory trial version http://www.fineprint.
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Hardware Functional Overview 4.3 Chipset Summary The A985 notebook consists of following major chipsets: Controller Chip Processor Core Logic Video Controller PCMCIA Controller Supper I/O Controller Audio Chip Sound Codec Chip Keyboard Controller PMU Controller Gas Gauge IC ROM BIOS Vendor Intel SIS Embedded in SIS 650 O2Micro SMSC Embedded in SIS 961 Realtek EME Mitsubishi Description uPGA 478 Intel Pentium 4 1.6/1.7/1.8/1.9/2.0/2.1/2.
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Hardware Functional Overview designed for much more interactive, highly integrative usage models such as collaborative workgroups, Internet audio and streaming video, image processing, video content creation, speech, 3-D, games, multimedia and multi-tasking user environments. It also delivers a world-class user experience across basic standalone office applications. The Pentium 4 processor offers great performance for today’s and tomorrow’s applications.
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Hardware Functional Overview 4.5 System Core Logic The system core logic function of the notebook is implemented on the CPU module and motherboard using the SiS650 IGUI HMAC. SiS650 IGUI Host Memory Controller integrates a high performance host interface for Intel Pentium 4 processor, a high performance 2D/3D Graphic Engine, a high performance memory controller, an AGP 4X interface, and SiS MuTIOL Technology connecting w/ SiS961 MuTIOL Media IO.
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Hardware Functional Overview High Performance Host Interface • • • • • • • • • Support Intel Pentium 4 series CPU with data transfer rate of 400MHz.
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Hardware Functional Overview − − − − − • Built-in hardware stereo auto rendering engine Supports Ultra-AGPIITM with 2GB/s bandwidth Up to 143 MHz 3D engine clock speed Peak polygon rate: 10M polygon/sec @ 1 pixel/polygon with Gouraud shaded, point-sampled, linear and bilinear texture mapping Peak fill rate: 286 M pixel/sec, 572 M texture/sec @ 10,000 pixel/polygon with Gouraud shaded and two bilinear textured, Z buffered and alpha blended Built-in a high quality 3D engine − Supports flat, and Gouraud shad
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Hardware Functional Overview • • • • − Transparent BitBlt with source and destination keys (16 ROPs) − Gradient color fill − Anti-aliasing text drawing − Alpha blended Bitblt Supports memory-mapped, zero wait-state, burst engine write Built-in 64x64x2 bit-mapped mono hardware cursor Built-in 64x64x16 bit-mapped blended color hardware cursor Maximum 64MB frame buffer with linear addressing Complete TV-OUT/Digital Flat Panel Solution • • • • • Built-in secondary CRT controller for independent secondary CR
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Hardware Functional Overview 4.5.2 SiS 961 MuTIOL Media I/O Features The SiS961 MuTIOL Media I/O integrates the Audio Controller with AC 97 Interface, the Ethernet MAC, the Dual Universal Serial Bus Host Controllers, the IDE Master/Slave controllers, and the MuTIOL Connect to PCI bridge. The PCI to LPC bridge, I/O Advanced Programmable Interrupt Controller, legacy system I/O, I/O Advanced Programmable Interrupt Controller and legacy power management functionalities are also integrated.
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Hardware Functional Overview • • • • Bi-directional 16-bit data bus at 266MHZ operating Frequency 533MB/s performance in 4x66 MHz mode Distributed Arbitration Scheme Supports Back to Back Transaction Integrated Multi-threaded I/O link ensures concurrency of upstream/down stream data transfer Multiple DMA Bus Architecture • • • • Concurrent Servicing of all DMA Devices: Dual IDE Controllers, Dual USB HCs, MAC Controller, and Audio/Modem DMA Controller Separate 32 Bit Input and Output Data Bus Scheme for e
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Hardware Functional Overview • • • Supports Audio and Modem function with Multithreaded I/O link mastering Supports two Consumer Audio Digital interface: traditional Consumer Digital Audio Out and AC97 V2.2 Compliance Consumer Audio Digital Interface Supports VRA Mode for both AC97 Audio Link and Consumer Audio Digital Interface Advanced Power Management  • • • • • • • • • • • • Meets ACPI 1.0b Requirements Meets APM 1.
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Hardware Functional Overview • • • • 4.7 - 14.318 MHz for PIIX4M refresh use 14.318 MHz XTAL for Clock Generator use 32.768 KHz XTAL for RTC real time clock 8.0 MHz XTAL for K/B controller use 14.318 MHz OSC for sound blaster use Cache Memory The primary (L1) and secondary (L2) level cache are integrated on the CPU. By incorporating the cache on-die (meaning it is combined with the CPU into one component), Intel eliminates the need for separate components.
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Hardware Functional Overview Features summary of the SIS 650 Video Chip Controller: Resolution, Color & Frame Rate • Supports 333 MHz pixel clock • Supports VESA standard super high resolution graphics modes − 640x480 16/256/32K/64K/16M colors 85 Hz NI − 800x600 16/256/32K/64K/16M colors 85 Hz NI − 1024x768 256/32K/64K/16M colors 85 Hz NI − 1280x1024 256/32K/64K/16M colors 85 Hz NI − 1600x1200 256/32K/64K/16M colors 85Hz NI − 1920x1440 256/32K/64K/16M colors 85Hz NI − 2048x1536 256/32K/64K/
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Hardware Functional Overview CARDBUS CONTROLLERS The OZ6912 is an ACPI and PC98/99 logo certified high performance, single slot PC Card controller with a synchronous 32-bit bus master/target PCI interface. This PC Card to PCI bridge host controller is compliant with the 2000 PC Card Standard. This standard incorporates the new 32-bit CardBus while retaining the 16-bit PC Card specification as defined by PCMCIA release 2.1.
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Hardware Functional Overview and I/O space • Intel™ 82365SL PCIC Register Compatible • Supports PCMCIA_ATA Specification • Supports 5V/3.3V PC and 3.
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Hardware Functional Overview 4.13 Keyboard and Pointing Device The Keyboard Subsystem of the notebook is implemented on the Motherboard and Keyboard Assembly using the ENE KB3886 keyboard controller chip and the Phoenix MultiKey/M3886L keyboard controller firmware. This chip controls the internal built-in keyboard, the built-in touchpad pointing device, as well as the external PS/2 keyboard and mouse port.
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Hardware Functional Overview The floppy disk drive supports standard 3.5-inch 720KB and 1.44MB mini-diskettes while adding support for 1.2MB (3 Mode) mini-diskettes for Japanese market. The notebook uses the 24X-speed IDE CD-ROM Drive that reads digital data stored on CDROM at 24 times faster rotational speed. The CD-ROM drive supports CD-DA transfer over ATAPI function that the host system can read CD audio data.
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Hardware Functional Overview 2. Get SMBus I/O port base address by reading from SmbBA register. 3. Clear SMBus status by writing 1Eh to SmbHstSts register. 4. Write the PMU07 slave address to SmbHstAdd register. − Send command to PMU08 -- Slave address is 04h. − Read data from PMU08 -- Slave address is 05h. 5. Write the desired command to SmbHstCmd register. 6. Write the desired parameters to SmbHstDat0 (High byte) and SmbHstDat1 (Low byte) registers if the system wants to send command to PMU08. 7.