Hardware Guide

4 Circuit Design
Copyright © Fibocom Wireless Inc. 57
 8-bit and 9-bit parallel data interfaces: The 8-bit interface uses the lower 8 bits (D0 to
D7) of the EBI2 bus, shared by the EBI2 with the Nand inside the module.
 The resolution is 320 (V) × 480 (H) pixels at a refresh rate of 30 fps.
The following figure shows the reference circuit of the LCD interface using H.028.015A01
LCD screen.
Figure 25. LCD reference circuit
4.4.11 SGMII
The LC116-LA module provides an SGMII interface with embedded Ethernet MAC. The
characteristics are as follows:
 It complies with IEEE 802.3 standard.
 It supports the 10M/100M/1000M working modes.
 The maximum downlink rate is 150 Mbps, and the maximum uplink rate is 50 Mbps
(on the 4G LTE network).
 It can be connected to an external Ethernet PHY chip such as AR8033, or an external
switch.
The following figure shows the simple diagram of the Ethernet application scheme.