User's Manual
Table Of Contents
- Copyright
- Attention
- Trademark
- Versions
- Foreword
- Product Overview
- Structure
- Hardware Introduction
- Hardware Interface
- Power Interface
- Power on/off and Reset Signal
- Status Indicating Signal
- USB /SSIC Interface
- USIM Interface
- Digital Audio
- Win8/Android Switch Control Interface
- W_DISABLE# Interface
- TX_BLANKING Interface
- WAKEUP_Host Interface
- BODY_SAR Interface
- I2C Interface
- Clock Interface
- Config Interface
- RF Interface
- Other Interfaces
- Electrical and Environmental Features
- RF Interface
L830-EA M.2 Module Hardware User Manual Page
21
of
45
41
NC
NC
42
GNSS_SDA
I/O
PU
PU
I2C serial data clock signal，
internal 4.7K pull-up resistor，
CMOS 1.8V
43
NC
NC
44
GNSS_IRQ
I
PU
PU
Win8/Android dual system switch
interrupt input signal, CMOS 1.8V
45
GND
GND
46
SYSCLK
O
PD
L
26MHz clock signal output
47
NC
NC
48
TX_BLANKING
O
L
L
GSM TDMA Timer output signal，
External GPS control signal ,
CMOS 1.8V
49
NC
NC
50
NC
NC
51
GND
GND
52
NC
NC
53
NC
NC
54
NC
NC
55
NC
NC
56
NC
NC
57
GND
GND
58
NC
NC
59
ANTCTL0
O
L
L
Tunable antenna control signal,bit0,
CMOS 1.8V. (Not supported yet)
60
NC
NC
61
ANTCTL1
O
L
L
Tunable antenna control signal, MIPI
RFFE SDATA, CMOS 1.8V .
(Not supported yet)
62
NC
NC
63
ANTCTL2
O
L
L
Tunable antenna control signal, MIPI
RFFE SCLK, CMOS 1.8V.
(Not supported yet)