User's Manual
Table Of Contents
- Copyright
- Attention
- Trademark
- Versions
- Foreword
- Product Overview
- Structure
- Hardware Introduction
- Hardware Interface
- Power Interface
- Power on/off and Reset Signal
- Status Indicating Signal
- USB /SSIC Interface
- USIM Interface
- Digital Audio
- Win8/Android Switch Control Interface
- W_DISABLE# Interface
- TX_BLANKING Interface
- WAKEUP_Host Interface
- BODY_SAR Interface
- I2C Interface
- Clock Interface
- Config Interface
- RF Interface
- Other Interfaces
- Electrical and Environmental Features
- RF Interface
L830-EA M.2 Module Hardware User Manual Page
19
of
45
CONFIG_3
1
Figure 4-2 Pin Diagram (TOP View)
4.1.2 Description of Pins
Pins of L830-EA M.2 modules are described in the table below:
Pin#
PIN Name
I/O
Reset
Value
Idle
Value
Description
1
CONFIG_3
O
L
L
The internal connected with GND,
L830-EA M.2 module shall configure
as the WWAN-SSIC0 interface type.
2
+3.3V
PI
Main power supply, voltage range:
3.135V ~ 4.4V
3
GND
GND
4
+3.3V
PI
Main power supply, voltage range:
3.135V ~ 4.4V
5
GND
GND
6
FUL_CARD_POWER_OFF#
I
PU
PU
Power off control signal, internal
200K pull-down resistor, CMOS 1.8V
7
USB D+
I/O
USB2.0 signal +
8
W_DISABLE1#
I
PD
PU
WWAN Disable, Low active,
CMOS 3.3V
9
USB D-
I/O
USB2.0 signal -
10
LED1#
O
OD
OD
System status LED, drain output ,
active low , CMOS 3.3V
11
GND
GND
12
Notch
Notch
13
Notch
Notch
14
Notch
Notch
15
Notch
Notch
16
Notch
Notch
17
Notch
Notch
18
Notch
Notch
19
Notch
Notch
20
I2S_CLK
O
PD
T
I2S serial clock,CMOS 1.8V ,