User's Manual

H350 LGA Serials Module Hardware User Manual Page of
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9 UART1_RXD I PU PU UART1 Received Data
UART2
51 UART2_TXD O PP PP
UART2 Transmitted Data(MUX as
SPI_MTSR)
50 UART2_RXD I PU PU
UART2 Received Data(MUX as
SPI_MRST)
ADC
41 ADC1 I
Analog digital converter 1
Input voltage: 0～1.2V
EINT
49 WAKE_UP I PU PU External wake-up interrupt, active low
48 EINT2 I PU PU External interrupt, active low
29
EINT3
I
PU PU External interrupt, active low
USB HSIC
35
HSIC_USB_DAT
A
HSIC USB data(not supported)
34
HSIC_USB_STR
B
HSIC USB pulse(not supported)
Clock
3
FSYS1_26M
O
L L
26M clock output
38 CLKOUT0 O PP PP Digital audio clock output
30 CLK32K O 32kclock output signal
Tunable ANT(In the developing stage, not suppurt)
4 ANTCTL3 O
L L Tunable antenna control signal, bit3.
2.5V
5 ANTCTL2 O
L L
Tunable antenna control signal, bit2.
2.5V
6 ANTCTL1 O
L L
Tunable antenna control signal, bit1.
1.8V
7 ANTCTL0 O
L L
Tunable antenna control signal, bit0.
1.8V