Datasheet

©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7S08 Rev. 1.9.0 8
NC7S08 — TinyLogic
®
HS 2-Input AND Gate
Physical Dimensions
Figure 4. 5-Lead SOT23, JEDEC MO-178, 1.6mm
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
5
1
4
32
LAND PATTERN RECOMMENDATION
B
A
L
C
0.10
C
0.20 C A B
0.60 REF
0.55
0.35
SEATING PLANE
0.25
GAGE PLANE
8°
0°
NOTES: UNLESS OTHEWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MO-178, ISSUE B, VARIATION AA,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
1.45 MAX
1.30
0.90
0.15
0.05
1.90
0.95
0.50
0.30
3.00
2.60
1.70
1.50
3.00
2.80
C
0.950.95
2.60
0.70
1.00
SEE DETAIL A
0.22
0.08
C) MA05Brev5
TOP VIEW
(0.30)