Datasheet
©1984 Fairchild Semiconductor Corporation www.fairchildsemi.com
MM74HCT74 Rev. 1.4.0 4
MM74HCT74 — Dual D-Type Flip-Flop with Preset and Clear
DC Electrical Characteristics
V
CC
=
5V ±10% (unless otherwise specified).
Note:
4. This is measured per pin. All other inputs are held at V
CC
Ground.
AC Electrical Characteristics
V
CC
=
5V, T
A
=
25°C, C
L
=
15 pF, t
r
=
t
f
=
6ns.
Symbol Parameter Conditions
T
A
=
Units
25°C
–40°C to
85°C
–55°C to
125°C
Typ. Guaranteed Limits
V
IH
Minimum HIGH Level
Input Voltage
2.0 2.0 2.0 V
V
IL
Maximum LOW Level
Input Voltage
0.8 0.8 0.8 V
V
OH
Minimum HIGH Level
Output Voltage
V
IN
=
V
IH
or V
IL
, |I
OUT
|
=
20µA V
CC
V
CC
– 0.1 V
CC
– 0.1 V
CC
– 0.1 V
V
IN
=
V
IH
or V
IL
, |I
OUT
|
=
4.0mA,
V
CC
=
4.5V
4.2 3.98 3.84 3.7
V
IN
=
V
IH
or V
IL
, |I
OUT
|
=
4.8mA,
V
CC
=
5.5V
5.2 4.98 4.84 4.7
V
OL
Maximum LOW Level
Voltage
V
IN
=
V
IH
or V
IL
, |I
OUT
|
=
20µA 0 0.1 0.1 0.1 V
V
IN
=
V
IH
or V
IL
, |I
OUT
|
=
4.0mA,
V
CC
=
4.5V
0.2 0.26 0.33 0.4
V
IN
=
V
IH
or V
IL
, |I
OUT
|
=
4.8mA,
V
CC
=
5.5V
0.2 0.26 0.33 0.4
I
IN
Maximum Input
Current
V
IN
=
V
CC
or GND, V
IH
or V
IL
±0.5 ±0.5 ±1.0 µA
I
CC
Maximum Quiescent
Supply Current
V
IN
=
V
CC
or GND, I
OUT
=
0µA 2.0 20 80 µA
V
IN
=
2.4V or 0.5V
(4)
0.3 0.4 0.5 mA
Symbol Parameter Conditions Typ.
Guaranteed
Limit Units
f
MAX
Maximum Operating Frequency from Clock to
Q or Q
50 30 MHz
t
PHL
, t
PLH
Maximum Propagation Delay Clock to Q or Q
18 30 ns
t
PHL
, t
PLH
Maximum Propagation Delay from Preset or
Clear to Q or Q
18 30 ns
t
REM
Minimum Removal Time, Preset or Clear to
Clock
20 ns
t
S
Minimum Setup Time Data to Clock 20 ns
t
H
Minimum Hold Time Clock to Data –3 0 ns
t
W
Minimum Pulse Width Clock, Preset or Clear 8 16 ns