Datasheet

MM74HCT74 — Dual D-Type Flip-Flop with Preset and Clear
©1984 Fairchild Semiconductor Corporation www.fairchildsemi.com
MM74HCT74 Rev. 1.4.0
March 2008
MM74HCT74
Dual D-Type Flip-Flop with Preset and Clear
Features
■
Typical propagation delay: 20ns
■ Low quiescent current: 40µA maximum (74HCT Series)
■
Low input current: 1µA maximum
■
Fanout of 10 LS-TTL loads
■
Meta-stable hardened
General Description
The MM74HCT74 utilizes advanced silicon-gate CMOS
technology to achieve operation speeds similar to the
equivalent LS-TTL part. It possesses the high noise
immunity and low power consumption of standard
CMOS integrated circuits, along with the ability to drive
10 LS-TTL loads.
This flip-flop has independent data, preset, clear, and
clock inputs and Q and Q
outputs. The logic level
present at the data input is transferred to the output
during the positive-going transition of the clock pulse.
Preset and clear are independent of the clock and
accomplished by a low level at the appropriate input.
The 74HCT logic family is functionally and pin-out
compatible with the standard 74LS logic family. All inputs
are protected from damage due to static discharge by
internal diode clamps to V
CC
and ground.
MM74HCT devices are intended to interface between
TTL and NMOS components and standard CMOS
devices. These parts are also plug-in replacements for
LS-TTL devices and can be used to reduce power
consumption in existing designs.
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order Number
Package
Number Package Description
MM74HCT74M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HCT74SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HCT74MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
MM74HCT74N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide