Datasheet

www.fairchildsemi.com 2
MM74HCT273
Truth Table
(Each Flip-Flop)
H HIGH Level (steady-state)
L
LOW Level (steady-state)
X
Don’t Care
Transition from LOW-to-HIGH level
Q0
The level of Q before the indicated steady-state input
conditions were established.
Logic Diagram
Inputs Outputs
Clear Clock D Q
LXXL
H
HH
H
LL
HLXQ0