Datasheet

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October 2009

MM74HCT14 • Rev. 1.4.2

MM74HCT14 — Hex Inverting Schmitt Trigger

MM74HCT14

Hex Inverting Schmitt Trigger

Features

 Typical Propagation Delay: 13ns

 Wide Power Supply Range: 4.5V–5.5V

 Low Quiescent Current: 10µA Maximum

 Low Input Current: 1µA Maximum

 Fanout of 10 LS-TTL Loads

 Typical Hysteresis Voltage: 0.6V at V

= 4.5V

 TTL, LS Pin-out and Input Threshold Compatible

Description

The MM74HCT14 utilizes advanced silicon-gate CMOS

technology to achieve the low power dissipation and

high noise immunity of standard CMOS, as well as the

capability to drive 10 LS-TTL loads.

The 74HCT logic family is functionally and pinout-

compatible with the standard 74LS logic family. Inputs

are protected from damage due to static discharge by

internal diode clamps to V

and ground.

Ordering Information

Part Number

Operating

Temperature

Range

Eco

Status

Package

Packing

Method

MM74HCT14M -40°C to +85°C RoHS

14-Lead, Small-Outline Integrated Circuit

(SOIC), JEDEC MS-012, 0.150in Narrow

Tube

MM74HCT14MX -40°C to +85°C RoHS

14-Lead, Small-Outline Integrated Circuit

(SOIC), JEDEC MS-012, 0.150in Narrow

Tape & Reel

MM74HCT14SJ -40°C to +85°C RoHS

14-Lead, Small-Outline Package (SOP),

EIAJ Type II, 5.3mm Wide

Tube

MM74HCT14SJX -40°C to +85°C RoHS

14-Lead, Small-Outline Package (SOP),

EIAJ Type II, 5.3mm Wide

Tape & Reel

MM74HCT14MTC -40°C to +85°C RoHS

14-Lead, Thin-Shrink Small-Outline Package

(TSSOP), JEDEC MO-153, 4.4mm Wide

Tube

MM74HCT14MTCX -40°C to +85°C RoHS

14-Lead, Thin-Shrink Small-Outline Package

(TSSOP), JEDEC MO-153, 4.4mm Wide

Tape & Reel

MM74HCT14SN -40°C to +85°C RoHS

14-Lead, Plastic Dual-Inline Package (PDIP),

JEDEC MS-001, 0.300in Wide

Tube

For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.

Summary of content (11 pages)

PAGE 1
MM74HCT14 Hex Inverting Schmitt Trigger Features Description The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads. Typical Propagation Delay: 13ns Wide Power Supply Range: 4.5V–5.5V Low Quiescent Current: 10µA Maximum Low Input Current: 1µA Maximum Fanout of 10 LS-TTL Loads Typical Hysteresis Voltage: 0.6V at VCC = 4.
PAGE 2
Figure 1. Pin Assignments MM74HCT14 — Hex Inverting Schmitt Trigger Connection Diagram Schematic Diagram Figure 2. Schematic © 1983 Fairchild Semiconductor Corporation MM74HCT14 • Rev. 1.4.2 www.fairchildsemi.
PAGE 3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Unless otherwise specified, all voltages are referenced to ground. Symbol Parameter Min. Max.
PAGE 4
Symbol Parameter Conditions VCC TA=+25°C Typ. 1.5 1.2 1.2 5.5 1.7 1.4 1.4 4.5 1.5 1.9 1.9 5.5 1.7 2.1 2.1 4.5 0.9 0.5 0.5 5.5 1.0 0.6 0.6 4.5 0.9 1.2 1.2 5.5 1.0 1.4 1.4 4.5 0.6 0.4 0.4 5.5 0.7 0.4 0.4 4.5 0.6 1.4 1.4 5.5 0.7 1.5 1.5 VIN =VIL, | IOUT | = 20µA 4.5 VCC VIN =VIL, | IOUT | = 4.0mA 4.5 4.20 3.98 3.84 VIN =VIL, | IOUT | = 4.8mA 5.5 5.20 4.98 4.98 VIN =VIL, | IOUT | = 20µA 4.5 0 0.1 0.1 VIN =VIL, | IOUT | = 4.0mA 4.5 0.2 0.
PAGE 5
VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns. Symbol tPHL, tPLH Parameter Typ. Guaranteed Limit Unit 10 18 ns Maximum Propagation Delay AC Electrical Characteristics Unless otherwise specified, VCC = 5V±10%, CL = 50pF, tr = tf = 6ns. Symbol Parameter Conditions TA=+25°C Typ.
PAGE 6
Figure 3. Low Power Oscillator Figure 4. Oscillator Input and Output Waveforms The following equations assume t1+t2>>tpd0+tpd1: t 2 ≈ RCIn f≈ VCC − VT − VCC − VT + 1 VT + (VCC − VT − ) RCIn VT − (VCC − VT + ) © 1983 Fairchild Semiconductor Corporation MM74HCT14 • Rev. 1.4.2 (1) MM74HCT14 — Hex Inverting Schmitt Trigger Typical Applications (2) www.fairchildsemi.
PAGE 7
8.75 8.50 0.65 A 7.62 14 8 B 5.60 4.00 3.80 6.00 PIN ONE INDICATOR 1 1.70 7 0.51 0.35 1.27 0.25 1.27 LAND PATTERN RECOMMENDATION M C B A (0.33) 1.75 MAX 1.50 1.25 MM74HCT14 — Hex Inverting Schmitt Trigger Physical Dimensions SEE DETAIL A 0.25 0.10 C 0.25 0.19 0.10 C NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AB, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD GAGE PLANE FLASH OR BURRS.
PAGE 8
MM74HCT14 — Hex Inverting Schmitt Trigger Physical Dimensions Figure 6. 14-Lead, Small-Outline Package (SOP), EIAJ Type II, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 9
MM74HCT14 — Hex Inverting Schmitt Trigger Physical Dimensions 0.65 0.43 TYP 1.65 6.10 0.45 12.00°TOP & BOTTOM R0.09 min A. CONFORMS TO JEDEC REGISTRATION MO-153, VARIATION AB, REF NOTE 6 B. DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONING AND TOLERANCES PER ANSI Y14.5M, 1982 E. LANDPATTERN STANDARD: SOP65P640X110-14M F. DRAWING FILE NAME: MTC14REV6 1.00 R0.09min Figure 7.
PAGE 10
MM74HCT14 — Hex Inverting Schmitt Trigger Physical Dimensions 19.56 18.80 14 8 6.60 6.09 1 7 (1.74) 8.12 7.62 1.77 1.14 3.56 3.30 0.35 0.20 5.33 MAX 0.38 MIN 3.81 3.17 0.58 0.35 8.82 2.54 NOTES: UNLESS OTHERWISE SPECIFIED THIS PACKAGE CONFORMS TO A) JEDEC MS-001 VARIATION BA B) ALL DIMENSIONS ARE IN MILLIMETERS. DIMENSIONS ARE EXCLUSIVE OF BURRS, C) MOLD FLASH, AND TIE BAR EXTRUSIONS. D) DIMENSIONS AND TOLERANCES PER ASME Y14.5-1994 E) DRAWING FILE NAME: MKT-N14AREV7 Figure 8.
PAGE 11
MM74HCT14 — Hex Inverting Schmitt Trigger © 1983 Fairchild Semiconductor Corporation MM74HCT14 • Rev. 1.4.2 www.fairchildsemi.