Datasheet

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September 1983

Revised May 2005

MM74HC245A Octal 3-STATE Transceiver

MM74HC245A

Octal 3-STATE Transceiver

General Description

The MM74HC245A 3-STATE bidirectional buffer utilizes

advanced silicon-gate CMOS technology, and is intended

for two-way asynchronous communication between data

buses. It has high drive current outputs which enable high

speed operation even when driving large bus capaci-

tances. This circuit possesses the low power consumption

and high noise immunity usually associated with CMOS cir-

cuitry, yet has speeds comparable to low power Schottky

TTL circuits.

This device has an active LOW enable input G

and a direc-

tion control input, DIR. When DIR is HIGH, data flows from

the A inputs to the B outputs. When DIR is LOW, data flows

from the B inputs to the A outputs. The MM74HC245A

transfers true data from one bus to the other.

This device can drive up to 15 LS-TTL Loads, and does not

have Schmitt trigger inputs. All inputs are protected from

damage due to static discharge by diodes to V

and

ground.

Features

■ Typical propagation delay: 13 ns

■ Wide power supply range: 2–6V

■ Low quiescent current: 80 A maximum (74 HC)

■ 3-STATE outputs for connection to bus oriented systems

■ High output drive: 6 mA (minimum)

■ Same as the 645

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Pin Assignments for DIP, SOIC, SOP and TSSOP

Top View

Truth Table

H HIGH Level

LOW Level

Irrelevant

Order Number Package Number Package Description

MM74HC245AWM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

MM74HC245ASJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HC245AMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HC245AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Control

Inputs Operation

DIR

L L B data to A bus

L H A data to B bus

HX Isolation

Summary of content (8 pages)

PAGE 1
Revised May 2005 MM74HC245A Octal 3-STATE Transceiver General Description Features The MM74HC245A 3-STATE bidirectional buffer utilizes advanced silicon-gate CMOS technology, and is intended for two-way asynchronous communication between data buses. It has high drive current outputs which enable high speed operation even when driving large bus capacitances.
PAGE 2
MM74HC245A Logic Diagram www.fairchildsemi.
PAGE 3
Recommended Operating Conditions Supply Voltage (VCC) DC Input Voltage DIR and G pins (VIN) DC Input/Output Voltage (VIN , VOUT) Clamp Diode Current (ICD) DC Output Current, per pin (IOUT) DC VCC or GND Current, per pin (ICC) Storage Temperature Range (TSTG) 0.5 to 7.0V 1.5 to VCC 1.5V 0.5 to VCC 0.5V r20 mA r35 mA r70 mA 65qC to 150qC Supply Voltage (VCC) 600 mW S.O.
PAGE 4
MM74HC245A AC Electrical Characteristics VCC 25qC, tr 5V, TA Symbol tf 6ns Parameter Conditions Guaranteed Typ Units Limit tPHL, tPLH Maximum Propagation Delay CL 45 pF 12 17 ns tPZH, tPZL Maximum Output Enable RL 1 k: 24 35 ns Time CL 45 pF Maximum Output Disable RL 1 k: 18 25 ns Time CL 5 pF tPHZ, tPLZ AC Electrical Characteristics VCC 2.0V to 6.
PAGE 5
MM74HC245A Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.
PAGE 6
MM74HC245A Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.
PAGE 7
MM74HC245A Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.
PAGE 8
MM74HC245A Octal 3-STATE Transceiver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.