Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsLogic ICsLogic IC - Demultiplexer, decoder Decoder/demultiplexer Single supply TSSOP 16

September 1983

Revised February 1999

MM74HC138 3-to-8 Line Decoder

MM74HC138

3-to-8 Line Decoder

General Description

The MM74HC138 decoder utilizes advanced silicon-gate

CMOS technology and is well suited to memory address

decoding or data routing applications. The circuit features

high noise immunity and low power consumption usually

associated with CMOS circuitry, yet has speeds compara-

ble to low power Schottky TTL logic.

The MM74HC138 has 3 binary select inputs (A, B, and C).

If the device is enabled, these inputs determine which one

of the eight normally HIGH outputs will go LOW. Two active

LOW and one active HIGH enables (G1, G2A

and G2B)

are provided to ease the cascading of decoders.

The decoder’s outputs can drive 10 low power Schottky

TTL equivalent loads, and are functionally and pin equiva-

lent to the 74LS138. All inputs are protected from damage

due to static discharge by diodes to V

and ground.

Features

■ Typical propagation delay: 20 ns

■ Wide power supply range: 2V–6V

■ Low quiescent current: 80 µA maximum (74HC Series)

■ Low input current: 1 µA maximum

■ Fanout of 10 LS-TTL loads

Ordering Code:

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Connection Diagram

Pin Assignment for DIP, SOIC, SOP and TSSOP

Order Number Package Number Package Description

MM74HC138M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

MM74HC138SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HC138MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HC138N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Summary of content (7 pages)

PAGE 1
Revised February 1999 MM74HC138 3-to-8 Line Decoder General Description The MM74HC138 decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications. The circuit features high noise immunity and low power consumption usually associated with CMOS circuitry, yet has speeds comparable to low power Schottky TTL logic. The MM74HC138 has 3 binary select inputs (A, B, and C).
PAGE 2
MM74HC138 Truth Table Inputs Outputs Enable Select G1 G2 (Note 1) C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X H X X X H H H H H H H H L X X X X H H H H H H H H H L L L L L H H H H H H H H L L L H H L H H H H H H H L L H L H H L H H H H H H L L H H H H H L H H H H H L H L L H H H H L H H H H L H L H H H H H H L H H H L H H L H H H H H H L H H L H H H H H H H H H H L H = HIGH
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Recommended Operating Conditions − 0.5 to + 7.0V Supply Voltage (VCC ) DC Input Voltage (VIN) − 1.5 to VCC + 1.5V DC Output Voltage (VOUT) − 0.5 to VCC + 0.5V Clamp Diode Current (IIK, IOK) ± 20 mA DC Output Current, per pin (IOUT) ± 25 mA DC VCC or GND Current, per pin Storage Temperature Range (TSTG) 600 mW 500 mW (Note 5) Symbol Conditions VIH VIL VOH Parameter 0 VCC V −40 +85 °C (tr, tf) VCC = 2.0V 1000 ns VCC = 4.5V 500 ns VCC = 6.
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MM74HC138 AC Electrical Characteristics VCC = 5V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns Symbol tPLH Parameter Conditions Guaranteed Typ Maximum Propagation Limit Units 18 25 ns 28 35 ns 18 25 ns 23 30 ns 18 25 ns Delay, Binary Select to any Output tPHL Maximum Propagation Delay, Binary Select to any Output tPHL, tPLH Maximum Propagation Delay, G1 to any Output tPHL Maximum Propagation Delay G2A or G2B to Output tPLH Maximum Propagation Delay G2A or G2B to Output AC Electrical
PAGE 5
MM74HC138 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Package Number M16A 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D 5 www.fairchildsemi.
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MM74HC138 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 www.fairchildsemi.
PAGE 7
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N16E LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1.