Datasheet

© 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA2258 • Rev. 1.0.5 7
FSA2258 — Low-Voltage, Dual-SPDT (0.8

) Analog Switch with 16kV ESD
Test Diagrams (Continued)
V
cc
0.9*V
out
V
cc
/2
BBM
0V
V
OUT
Input - V
Sel
0.9*V
ou
t
t
RISE
=2.5ns
90%
10%
C
L
nB
n
R
L
nA
GND
GND
R
S
V
Sel
V
IN
GND
R
L
and C
L
are functions of the application
environment (50, 75, or 100 ).
C
L
includes test fixture and stray capacitance.
V
OUT
V
IN
GND
t
--
R
L
and C
L
Figure 8. Break-Before-Make Interval Timing
V
OUT
GND
GND
R
T
GND
GND
V
S
R
S
Network Analyzer
V
Sel
GND
R
L
and C
L
are functions of the application
environment (50, 75, or 100 ).
C
L
includes test fixture and stray capacitance.
V
IN
L
Figure 9. Bandwidth
V
OUT
GND
GND
R
T
GND
GND
V
S
R
S
Network Analyzer
R
T
GND
R
S
and R
T
are functions of the application
environment (50, 75, or 100 ).
V
Sel
GND
Off-Isolation = 20 Log (V
OUT
/V
IN
)-
Figure 10. Channel Off Isolation