Datasheet

© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA1259 / FSA1259A Rev. 1.0.6 8
FSA1259 / FSA1259A — Low-Voltage, 1Ω SPST Analog Switch with Power-Off Isolation
Test Diagrams
t
OFF
t
R
= t
F
= 2.5ns
0.9 x V
OUT
0.9 x V
OUT
R
L
50
C
L
35pF
50%
GND
V
CC
Control
Input
Switch
Output
V
OUT
V
OUT
t
ON
V
CC
V
B
1B or 2B
C
L
includes fixture and stray capacitance. Logic input waveforms inverted for switches
that have the opposite logic sense.
A
S
0V
0V
Figure 11. Turn On / Off Timing
GND
OFF ISOLATION = 20log
Network
Analyzer
MEAS REF
A
V
OUT
V
IN
ON-LOSS = 20log
V
OUT
V
IN
CROSSTALK = 20log
V
OUT
V
IN
1B
2B
S
V
CC
10nF
0 or V
CC
V
CC
50
50 50
50 50
V
OUT
V
IN
Figure 12. Off Isolation and Crosstalk
Q = (ΔV
OUT
) • (C
L
)
ΔV
OUT
V
OUT
In
V
GEN
C
L
V
CC
1B or 2B
GND
On
Off
V
OUT
Off
In
On
Off
Off
Control
Input
R
GEN
S
A
Figure 13. Charge Injection