Datasheet
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA1259 / FSA1259A Rev. 1.0.6 10
FSA1259 / FSA1259A — Low-Voltage, 1Ω SPST Analog Switch with Power-Off Isolation
Physical Dimensions
0.30 TYP
SEATING PLANE
0.10-0.18
0.13 AB C
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
D. DIMENSIONS AND TOLERANCES PER ANSI Y14.5M, 1982.
AND TIE BAR EXTRUSIONS.
MAB08AREVC
0.50TYP
B. DIMENSIONS ARE IN MILLIMETERS.
A. CONFORMS TO JEDEC REGISTRATION MO-187
-C-
0.17-0.27
0.10
0.00
DETAIL A
0°-8°
0.4 TYP
-B-
0.70±0.10
ALL LEAD TIPS
0.2
CBA
3.1±.1
0.15
PIN #1 IDENT.
0.90 MAX
ALL LEAD TIPS
0.1
C
1.55
8
1
4
2.3±0.1
5
-A-
0.70
2.70
3.40
1.00
0.5 TYP
DETAIL A
1.80
GAGE PLANE
0.12
Figure 17. 8-Lead US8, JEDEC MO-187, Variation CA, 3.0mm Wide Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
.
