Datasheet

FMS6502 8-Input, 6-Output Video Switch Matrix with Output Drivers, Input Clamp, and Bias Circuitry
© 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
FMS6502 Rev. 1.0.0 6
I
2
C BUS Characteristics
T
A
= 25°C, V
cc
= 5V unless otherwise noted.
Note:
1. 100% tested at 25°C.
Figure 3. I
2
C Bus Timing
Symbol Parameter Conditions Min. Typ. Max. Unit
V
il
Digital Input Low
1
SDA,SCL,ADDR 0 1.5 V
V
ih
Digital Input High
1
SDA,SCL,ADDR 3.0 V
cc
V
f
SCL
Clock Frequency SCL 100 kHz
tr Input Rise Time 1.5V to 3V 1000 ns
tf Input Fall Time 1.5V to 3V 300 ns
t
low
Clock Low Period 4.7 µs
t
high
Clock High Period 4.0 µs
t
SU,DAT
Data Set-up Time 300 ns
t
HD,DAT
Data Hold Time 0 ns
t
SU,STO
Set-up Time from Clock High to Stop 4 µs
t
BUF
Start Set-up Time following a Stop 4.7 µs
t
HD,STA
Start Hold Time 4 µs
t
SU,STA
Start Set-up Time following Clock Low to High 4.7 µs
SDA
SCL
SDA
t
BUF
t
LOW
t
t
HD,STA
t
r
t
HD,DAT
t
HIGH
t
SU,DAT
t
SU,STO
t
SU,STA
f