Datasheet

FMS6502 8-Input, 6-Output Video Switch Matrix with Output Drivers, Input Clamp, and Bias Circuitry
© 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
FMS6502 Rev. 1.0.0 2
Pin Configuration
Figure 2. Pin Configuration
Pin Description
IN1
IN2
OUT1
OUT
5
GND
16
15
1
2
3
4
5
6
7
OUT
4
VDD
OUT
2
8
9
10
GND
17
18
19
20
21
22
23
24
GND
OUT
3
OUT
6
IN8
IN5
ADDR0
IN3
VDD
IN4
GND
ADDR1
FAIRCHILD
FMS6502
24L TSSOP
SDA
14
13
11
12
IN7
IN6
SCL
Pin# Pin Type Description
1 IN1 Input Input, channel 1
2 GND Output Must be tied to ground
3 IN2 Input Input, channel 2
4 VDD Input Positive power supply
5 IN3 Input Input, channel 3
6 GND Output Must be tied to ground
7 IN4 Input Input, channel 4
8 ADDR1 Input Selects I
2
C address
9 IN5 Input Input, channel 5
10 ADDR0 Input Selects I
2
C address
11 IN6 Input Input, channel 6
12 SCL Input Serial clock for I
2
C port
13 IN7 Input Input, channel 7
14 SDA Input Serial data for I
2
C port
15 IN8 Input Input, channel 8
16 GND Output Must be tied to ground
17 OUT6 Output Output, channel 6
18 OUT5 Output Output, channel 5
19 OUT4 Output Output, channel 4
20 VDD Input Positive power supply
21 OUT3 Output Output, channel 3
22 OUT2 Output Output, channel 2
23 OUT1 Output Output, channel 1
24 GND Output Must be tied to ground