Datasheet
FDN537N Single N-Channel Power Trench
®
MOSFET
©2013 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com
FDN537N Rev.C2
Electrical Characteristics T
J
= 25 °C unless otherwise noted
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Symbol Parameter Test Conditions Min Typ Max Units
BV
DSS
Drain to Source Breakdown Voltage I
D
= 250 μA, V
GS
= 0 V 30 V
ΔBV
DSS
ΔT
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250 μA, referenced to 25 °C 18 mV/°C
I
DSS
Zero Gate Voltage Drain Current V
DS
= 24 V, V
GS
= 0 V 1 μA
I
GSS
Gate to Source Leakage Current, Forward V
GS
= 20 V, V
DS
= 0 V 100 nA
V
GS(th)
Gate to Source Threshold Voltage V
GS
= V
DS
, I
D
= 250 μA1.21.83.0V
ΔV
GS(th)
ΔT
J
Gate to Source Threshold Voltage
Temperature Coefficient
I
D
= 250 μA, referenced to 25 °C -6 mV/°C
r
DS(on)
Static Drain to Source On Resistance
V
GS
= 10 V, I
D
= 6.5 A 19 23
mΩV
GS
= 4.5 V, I
D
= 6.0 A 25 36
V
GS
= 10 V, I
D
= 6.5 A, T
J
= 125 °C 25 30
g
FS
Forward Transconductance V
DD
= 5 V, I
D
= 6.5 A 24 S
C
iss
Input Capacitance
V
DS
= 15 V, V
GS
= 0 V,
f = 1 MHz
360 465 pF
C
oss
Output Capacitance 143 180 pF
C
rss
Reverse Transfer Capacitance 22 35 pF
R
g
Gate Resistance 1.0 Ω
t
d(on)
Turn-On Delay Time
V
DD
= 15 V, I
D
= 6.5 A,
V
GS
= 10 V, R
GEN
= 6 Ω
510ns
t
r
Rise Time 110ns
t
d(off)
Turn-Off Delay Time 11 19 ns
t
f
Fall Time 110ns
Q
g(TOT)
Total Gate Charge V
GS
= 0 V to 10 V
V
DD
= 15 V
I
D
= 6.5 A
6.0 8.4 nC
Total Gate Charge V
GS
= 0 V to 4.5 V 3.0 4.2 nC
Q
gs
Total Gate Charge 1.2 nC
Q
gd
Gate to Drain “Miller” Charge 1.1 nC
V
SD
Source to Drain Diode Forward Voltage V
GS
= 0 V, I
S
= 6.5 A (Note 2) 0.86 1.2 V
t
rr
Reverse Recovery Time
I
F
= 6.5 A, di/dt = 100 A/μs
14 22 ns
Q
rr
Reverse Recovery Charge 3 10 nC
NOTES:
1. R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
80 °C/W when mounted on a
1 in
2
pad of 2 oz copper
a)
180 °C/W when mounted on a
minimum pad.
b)
G
DF
DS
SF
SS
G
DF
DS
SF
SS