Datasheet
www.fairchildsemi.com
2
©2009 Fairchild Semiconductor Corporation
FDD6796A / FDU6796A_F071 Rev.C1
FDD6796A / FDU679A_F071 N-Channel PowerTrench
®
MOSFET
Electrical Characteristics T
J
= 25 °C unless otherwise noted
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Symbol Parameter Test Conditions Min Typ Max Units
BV
DSS
Drain to Source Breakdown Voltage I
D
= 250 µA, V
GS
= 0 V 25 V
∆BV
DSS
∆T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250 µA, referenced to 25 °C 16 mV/°C
I
DSS
Zero Gate Voltage Drain Current V
DS
= 20 V, V
GS
= 0 V 1 µA
I
GSS
Gate to Source Leakage Current V
GS
= ±20 V, V
DS
= 0 V ±100 nA
V
GS(th)
Gate to Source Threshold Voltage V
GS
= V
DS
, I
D
= 250 µA 1.0 1.9 3.0 V
∆V
GS(th)
∆T
J
Gate to Source Threshold Voltage
Temperature Coefficient
I
D
= 250 µA, referenced to 25 °C -6 mV/°C
r
DS(on)
Static Drain to Source On Resistance
V
GS
= 10 V, I
D
= 20 A 4.3 5.7
mΩV
GS
= 4.5 V, I
D
= 15.2 A 11.1 15.0
V
GS
= 10 V, I
D
= 20 A, T
J
= 150 °C 6.5 8.6
g
FS
Forward Transconductance V
DS
= 5 V, I
D
= 20 A 118 S
C
iss
Input Capacitance
V
DS
= 13 V, V
GS
= 0 V,
f = 1 MHz
1336 1780 pF
C
oss
Output Capacitance 298 400 pF
C
rss
Reverse Transfer Capacitance 266 400 pF
R
g
Gate Resistance 1.2 Ω
t
d(on)
Turn-On Delay Time
V
DD
= 13 V, I
D
= 20 A,
V
GS
= 10 V, R
GEN
= 6 Ω
816ns
t
r
Rise Time 714ns
t
d(off)
Turn-Off Delay Time 19 34 ns
t
f
Fall Time 410ns
Q
g
Total Gate Charge V
GS
= 0 V to 10 V
V
DD
= 13 V,
I
D
= 20 A
24 34 nC
Q
g
Total Gate Charge V
GS
= 0 V to 5 V 14 20 nC
Q
gs
Gate to Source Charge 4.0 nC
Q
gd
Gate to Drain “Miller” Charge 5.7 nC
V
SD
Source to Drain Diode Forward Voltage
V
GS
= 0 V, I
S
= 3.1 A (Note 2) 0.8 1.2
V
V
GS
= 0 V, I
S
= 20 A (Note 2) 0.9 1.3
t
rr
Reverse Recovery Time
I
F
= 20 A, di/dt = 100 A/µs
15 27 ns
Q
rr
Reverse Recovery Charge 4 10 nC
40 °C/W when mounted on a
1 in
2
pad of 2 oz copper
96 °C/W when mounted on
a minimum pad
a)
b)
Notes:
1: R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R
θJC
is guaranteed by design while R
θJA
is determined by the user’s board design.
2: Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3: E
AS
of 40 mJ is based on starting T
J
= 25 °C, L = 1 mH, I
AS
= 9 A, V
DD
= 23 V, V
GS
= 10 V. 100% test at L = 0.1 mH, I
AS
= 21 A.