Datasheet

FDC8602 Dual N-Channel Shielded Gate PowerTrench
®
MOSFET
©2011 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com
FDC8602 Rev.C1
Figure 7.
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
0
2
4
6
8
10
I
D
= 1.2 A
V
DD
= 75 V
V
DD
= 25 V
V
GS
, GATE TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
V
DD
= 50 V
Gate Charge Characteristics Figure 8.
0.1 1 10 100
0.1
1
10
500
f = 1 MHz
V
GS
= 0 V
CAPACITANCE (pF)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
C
rss
C
oss
C
iss
C a p a c i t a n c e v s D r a i n
to Source Voltage
Figure 9.
0.01 0.1 1 10
0.1
1
2
T
J
= 100
o
C
T
J
= 25
o
C
T
J
= 125
o
C
t
AV
, TIME IN AVALANCHE (ms)
I
AS
, AVALANCHE CURRENT (A)
U n c l a m p e d I n d u c t i v e
Switching Capability
Figure 10.
0.1 1 10 100 400
0.005
0.01
0.1
1
10
100 us
1 ms
1 s
10 ms
DC
10 s
100 ms
I
D
, DRAIN CURRENT (A)
V
DS
, DRAIN to SOURCE VOLTAGE (V)
THIS AREA IS
LIMITED BY r
DS(on)
SINGLE PULSE
T
J
= MAX RATED
R
θJA
= 180
o
C/W
T
A
= 25
o
C
Forward Bias Safe
Operating Area
Figure 11. Single Pulse Maximum Power Dissipation
10
-4
10
-3
10
-2
10
-1
110
100 1000
0.5
1
10
100
V
GS
= 10 V
P
(PK)
, PEAK TRANSIENT POWER (W)
SINGLE PULSE
R
θJA
= 180
o
C/W
T
A
= 25
o
C
t, PULSE WIDTH (sec)
Typical Characteristics T
J
= 25 °C unless otherwise noted