Datasheet
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN3226 / FAN3227 / FAN3228 / FAN3229 • Rev. 1.1.0 9
FAN3226 / FAN3227 / FAN3228 / FAN3229 — Dual 2-A High-Speed, Low-Side Gate Drivers
Electrical Characteristics (Continued)
Unless otherwise noted, V
DD
=12 V, T
J
=-40°C to +125°C. Currents are defined as positive into the device and
negative out of the device.
Symbol Parameter Conditions Min. Typ. Max. Unit
ENABLE (FAN3226C, FAN3226T, FAN3227C, FAN3227T) (continued)
t
D3
EN to Output Propagation Delay
(12)
0 V to 5 V EN, 1 V/ns Slew Rate 10 19 34 ns
t
D4
5 V to 0 V EN, 1 V/ns Slew Rate 10 18 32 ns
FAN3226CMX, FAN3226TMX, FAN3227CMX, FAN3227TMX_F085 (Automotive-Qualified Versions)
t
D3
EN to Output Propagation Delay
(12),(14)
0 V to 5 V EN, 1 V/ns Slew Rate 8 19 35 ns
t
D4
5 V to 0 V EN, 1 V/ns Slew Rate 8 18 35 ns
Outputs
I
SINK
OUT Current, Mid-Voltage, Sinking
(11)
OUT at V
DD
/2,
C
LOAD
=0.1 µF, f=1 kHz
2.4 A
I
SOURCE
OUT Current, Mid-Voltage,
Sourcing
(11)
OUT at V
DD
/2,
C
LOAD
=0.1 µF, f=1 kHz
-1.6 A
I
PK_SINK
OUT Current, Peak, Sinking
(11)
C
LOAD
=0.1 µF, f=1 kHz 3 A
I
PK_SOURCE
OUT Current, Peak, Sourcing
(11)
C
LOAD
=0.1 µF, f=1 kHz -3 A
t
RISE
Output Rise Time
(13)
C
LOAD
=1000 pF 12 22 ns
t
FALL
Output Fall Time
(13)
C
LOAD
=1000 pF 9 17 ns
I
RVS
Output Reverse Current Withstand
(11)
500 mA
FAN322xT, FAN322xC
t
D1
Output Propagation Delay, CMOS
Inputs
(13)
CMOS Input 7 15 30
ns
t
D2
CMOS Input 6 15 29
t
D1
Output Propagation Delay, TTL
Inputs
(13)
TTL Input 10 19 34
ns
t
D2
TTL Input 10 18 32
t
DEL.MATCH
Propagation Matching Between
Channels
(14)
INA=INB, OUTA and OUTB at
50% Point
1 2 ns
FAN322xTMX_F085, FAN322xCMX_F085 (Automotive-Qualified Versions)
t
D1
Output Propagation Delay, CMOS
Inputs
(13),(14)
CMOS Input
7 15 33
ns
t
D2
CMOS Input 6 15 42
t
D1
Output Propagation Delay, TTL
Inputs
(13),(14)
TTL Input 9 19 34
ns
t
D2
TTL Input
9 18 32
t
DEL.MATCH
Propagation Matching Between
Channels
(14)
INA=INB, OUTA and OUTB at
50% Point
2 4 ns
V
OH
High Level Output Voltage
(14)
V
OH
=V
DD
–V
OUT
, I
OUT
=–1 mA
15 35 mV
V
OL
Low Level Output Voltage
(14)
I
OUT
= 1 mA 10 25 mV
Notes:
9. Lower supply current due to inactive TTL circuitry.
10. EN inputs have TTL thresholds; refer to the ENABLE section.
11. Not tested in production.
12. See Timing Diagrams of Figure 11 and Figure 12.
13. See Timing Diagrams of Figure 9 and Figure 10.
14. Apply to only F085 Version