Datasheet

© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN3226 / FAN3227 / FAN3228 / FAN3229 • Rev. 1.1.0 4
FAN3226 / FAN3227 / FAN3228 / FAN3229 — Dual 2-A High-Speed, Low-Side Gate Drivers
FAN3226 FAN3227 FAN3228 FAN3229
Figure 4. Pin Configurations (Repeated)
Pin Definitions
Name Pin Description
ENA
Enable Input for Channel A. Pull pin LOW to inhibit driver A. ENA has TTL thresholds for both TTL and
CMOS INx threshold.
ENB
Enable Input for Channel B. Pull pin LOW to inhibit driver B. ENB has TTL thresholds for both TTL and
CMOS INx threshold.
GND
Ground. Common ground reference for input and output circuits.
INA
Input to Channel A.
INA+
Non-Inverting Input to Channel A. Connect to VDD to enable output.
INA-
Inverting Input to Channel A. Connect to GND to enable output.
INB
Input to Channel B.
INB+
Non-Inverting Input to Channel B. Connect to VDD to enable output.
INB-
Inverting Input to Channel B. Connect to GND to enable output.
OUTA
Gate Drive Output A: Held LOW unless required input(s) are present and V
DD
is above UVLO threshold.
OUTB
Gate Drive Output B: Held LOW unless required input(s) are present and V
DD
is above UVLO threshold.
OUTA
Gate Drive Output A (inverted from the input): Held LOW unless required input is present and V
DD
is
above UVLO threshold.
OUTB
Gate Drive Output B (inverted from the input): Held LOW unless required input is present and V
DD
is
above UVLO threshold.
P1
Thermal Pad (MLP only). Exposed metal on the bottom of the package; may be left floating or connected
to GND; NOT suitable for carrying current.
VDD
Supply Voltage. Provides power to the IC.
Output Logic
FAN3226 (x=A or B) FAN3227 (x=A or B)
FAN3228 and FAN3229
(x=A or B)
ENx INx
OUTx
ENx INx OUTx INx+ INx− OUTx
0 0 0 0 0
(8)
0 0
(8)
0 0
0 1
(8)
0 0 1 0 0
(8)
1
(8)
0
1
(8)
0 1 1
(8)
0
(8)
0 1 0 1
1
(8)
1
(8)
0 1
(8)
1 1 1 1
(8)
0
Note:
8. Default input signal if no external connection is made.