Datasheet

© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN3226 / FAN3227 / FAN3228 / FAN3229 • Rev. 1.1.0 21
FAN3226 / FAN3227 / FAN3228 / FAN3229 — Dual 2-A High-Speed, Low-Side Gate Drivers
Thermal Guidelines
Gate drivers used to switch MOSFETs and IGBTs at
high frequencies can dissipate significant amounts of
power. It is important to determine the driver power
dissipation and the resulting junction temperature in the
application to ensure that the part is operating within
acceptable temperature limits.
The total power dissipation in a gate driver is the sum of
two components, P
GATE
and P
DYNAMIC
:
P
TOTAL
= P
GATE
+ P
DYNAMIC
(1)
Gate Driving Loss: The most significant power loss
results from supplying gate current (charge per unit
time) to switch the load MOSFET on and off at the
switching frequency. The power dissipation that
results from driving a MOSFET at a specified gate-
source voltage, V
GS
, with gate charge, Q
G
, at
switching frequency, f
SW
, is determined by:
P
GATE
= Q
G
• V
GS
• f
SW
• n (2)
n is the number of driver channels in use (1 or 2).
Dynamic Pre-drive / Shoot-through Current: A
power loss resulting from internal current
consumption under dynamic operating conditions,
including pin pull-up / pull-down resistors, can be
obtained using the “I
DD
(No-Load) vs. Frequency”
graphs in Typical Performance Characteristics to
determine the current I
DYNAMIC
drawn from V
DD
under actual operating conditions:
P
DYNAMIC
= I
DYNAMIC
• V
DD
• n (3)
Once the power dissipated in the driver is determined,
the driver junction rise with respect to circuit board can
be evaluated using the following thermal equation,
assuming
ψ
JB
was determined for a similar thermal
design (heat sinking and air flow):
T
J
= P
TOTAL
•
ψ
JB
+ T
B
(4)
where:
T
J
= driver junction temperature
ψ
JB
= (psi) thermal characterization parameter
relating temperature rise to total power
dissipation
T
B
= board temperature in location defined in Note
2 under Thermal Resistance table.
In the forward converter with synchronous rectifier
shown in the typical application diagrams, the
FDMS8660S is a reasonable MOSFET selection. The
gate charge for each SR MOSFET would be 60 nC with
V
GS
= V
DD
= 7V. At a switching frequency of 500 kHz,
the total power dissipation is:
P
GATE
= 60 nC • 7 V • 500 kHz • 2 = 0.42 W (5)
P
DYNAMIC
= 3 mA • 7 V • 2 = 0.042 W (6)
P
TOTAL
= 0.46 W (7)
The SOIC-8 has a junction-to-board thermal
characterization parameter of
ψ
JB
= 43°C/W. In a
system application, the localized temperature around
the device is a function of the layout and construction of
the PCB along with airflow across the surfaces. To
ensure reliable operation, the maximum junction
temperature of the device must be prevented from
exceeding the maximum rating of 150°C; with 80%
derating, T
J
would be limited to 120°C. Rearranging
Equation 4 determines the board temperature required
to maintain the junction temperature below 120°C:
T
B
= T
J
- P
TOTAL
•
ψ
JB
(8)
T
B
= 120°C – 0.46 W • 43°C/W = 100°C (9)
For comparison, replace the SOIC-8 used in the
previous example with the 3x3 mm MLP package with
ψ
JB
= 3.5°C/W. The 3x3 mm MLP package could
operate at a PCB temperature of 118°C, while
maintaining the junction temperature below 120°C. This
illustrates that the physically smaller MLP package with
thermal pad offers a more conductive path to remove
the heat from the driver. Consider tradeoffs between
reducing overall circuit size with junction temperature
reduction for increased reliability.