Datasheet

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74LVT245, 74LVTH245 — Low Voltage Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs

74LVT245, 74LVTH245 Rev. 1.4.0

February 2008

74LVT245, 74LVTH245

Low Voltage Octal Bidirectional Transceiver with 3-STATE

Inputs/Outputs

Features

■

Input and output interface capability to systems at

5V V

■

Bushold data inputs eliminate the need for external

pull-up resistors to hold unused inputs (74LVTH245),

also available without bushold feature (74LVT245)

■

Live insertion/extraction permitted

■

Power Up/Down high impedance provides glitch-free

bus loading

■

Outputs source/sink, –32mA/+64mA

■

Latch-up performance exceeds 500mA

■

ESD performance:

– Human-body model

2000V

– Machine model

200V

– Charged-device model

1000V

General Description

The LVT245 and LVTH245 contain eight non-inverting

bidirectional buffers with 3-STATE outputs and are

intended for bus-oriented applications. The Transmit/

Receive (T/R

) input determines the direction of data flow

through the bidirectional transceiver. Transmit (active-

HIGH) enables data from A ports to B ports; Receive

(active-LOW) enables data from B ports to A ports. The

Output Enable input, when HIGH, disables both A and B

ports by placing them in a HIGH Z condition.

The LVTH245 data inputs include bushold, eliminating

the need for external pull-up resistors to hold unused

inputs.

These transceivers are designed for low-voltage (3.3V)

applications, but with the capability to provide a TTL

interface to a 5V environment. The LVT245 and

LVTH245 are fabricated with an advanced BiCMOS

technology to achieve high speed operation similar to 5V

ABT while maintaining a low power dissipation.

Ordering Information

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

Order Number

Package

Number Package Description

74LVT245WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74LVT245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVT245MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

74LVT245MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

74LVTH245WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74LVTH245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVTH245MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

74LVTH245MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

Summary of content (10 pages)

PAGE 1
74LVT245, 74LVTH245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs Features General Description ■ Input and output interface capability to systems at The LVT245 and LVTH245 contain eight non-inverting bidirectional buffers with 3-STATE outputs and are intended for bus-oriented applications. The Transmit/ Receive (T/R) input determines the direction of data flow through the bidirectional transceiver.
PAGE 2
Logic Symbols IEEE/IEC Pin Description Pin Names Description OE Output Enable Input T/R Transmit/Receive Input A0–A7 Side A Inputs or 3-STATE Outputs B0–B7 Side B Inputs or 3-STATE Outputs Truth Table Inputs OE T/R L L Bus B Data to Bus A L H Bus A Data to Bus B H X HIGH-Z State Outputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial ©1999 Fairchild Semiconductor Corporation 74LVT245, 74LVTH245 Rev. 1.4.0 www.fairchildsemi.
PAGE 3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC Parameter Rating Supply Voltage –0.5V to +4.6V VI DC Input Voltage –0.5V to +7.
PAGE 4
TA = –40°C to +85°C Symbol Parameter VCC (V) Conditions Min. II = –18mA Units –1.2 V VIK Input Clamp Diode Voltage VIH Input HIGH Voltage 2.7–3.6 VIL Input LOW Voltage 2.7–3.6 VO ≤ 0.1V or VO ≥ VCC – 0.1V VOH Output HIGH Voltage 2.7–3.6 IOH = –100µA VCC – 0.2 2.7 IOH = – 8mA 2.4 3.0 IOH = –32mA 2.0 2.7 IOL = 100µA 0.2 IOL = 24mA 0.5 IOL = 16mA 0.4 IOL = 32mA 0.5 IOL = 64mA 0.55 Output LOW Voltage VOL 2.7 Max. 3.
PAGE 5
Symbol Parameter VCC (V) TA = 25°C Conditions CL = 50 pF, RL = 500Ω VOLP Quiet Output Maximum Dynamic VOL 3.3 (7) VOLV Quiet Output Minimum Dynamic VOL 3.3 (7) Min. Typ. Max. Units 0.8 V –0.8 V Notes: 6. Characterized in SOIC package. Guaranteed parameter, but not tested. 7. Max number of outputs defined as (n). n–1 data inputs are driven 0V to 3V. Output under test held LOW. AC Electrical Characteristics TA = –40°C to +85°C, CL = 50 pF, RL = 500Ω VCC = 3.3V ± 0.
PAGE 6
13.00 12.60 A 11.43 20 11 B 9.50 10.65 7.60 10.00 7.40 2.25 1 10 0.51 0.35 PIN ONE INDICATOR 0.25 M 0.65 1.27 1.27 C B A LAND PATTERN RECOMMENDATION 2.65 MAX SEE DETAIL A 0.33 0.20 C 0.75 0.25 X 45° SEATING PLANE NOTES: UNLESS OTHERWISE SPECIFIED (R0.10) GAGE PLANE (R0.10) 0.10 C 0.30 0.10 0.25 8° 0° A) THIS PACKAGE CONFORMS TO JEDEC MS-013, VARIATION AC, ISSUE E B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) CONFORMS TO ASME Y14.
PAGE 7
4LVT245, 74LVTH245 — Low Voltage Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs Physical Dimensions (Continued) Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 8
Figure 3. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 9
74LVT245, 74LVTH245 — Low Voltage Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs Physical Dimensions (Continued) Figure 4. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 10
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