Datasheet
74LCX86 — Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs
©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX86 Rev. 1.5.0
March 2008
74LCX86
Low Voltage Quad 2-Input Exclusive-OR Gate with 5V
Tolerant Inputs
Features
■
5V tolerant inputs
■
2.3V–3.6V V
CC
specifications provided
■
6.5ns t
PD
max. (V
CC
=
3.3V), 10µA I
CC
max.
■
Power down high impedance inputs and outputs
■
±24mA output drive (V
CC
=
3.0V)
■
■
Latch-up performance exceeds 500mA
■
ESD performance:
– Machine model
>
2000V
– Human model
>
200V
General Description
The LCX86 contains four 2-input exclusive-OR gates.
The inputs tolerate voltages up to 7V allowing the inter-
face of 5V systems to 3V systems.
The 74LCX86 is fabricated with advanced CMOS tech-
nology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order
Number
Package
Number Package Description
74LCX86M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX86SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX86MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Implements proprietary noise/EMI reduction circuitry