Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsLogic ICsLogic IC - Buffer, driver TSSOP 20

74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs

74LCX541 Rev. 1.6.1

74LCX541

Low Voltage Octal Buffer/Line Driver

with 5V Tolerant Inputs and Outputs

Features

■

5V tolerant input and outputs

■

2.3V–3.6V V

specifications provided

■

6.5ns t

max (V

3.3V), 10µA I

max

■

Power-down high impedance inputs and outputs

■

Supports live insertion/withdrawal

(1)

■

±24 mA output drive (V

3.0V)

■

Latch-up performance exceeds JEDEC 78 conditions

■

ESD performance

– Human body model

2000V

– Machine model

200V

■

Leadless DQFN package

Note:

1. To ensure the high impedance state during power up

or down, OE should be tied to V

through a pull-up

resistor: the minimum value of the resistor is

determined by the current-sourcing capability of the

driver.

General Description

The LCX541 is an octal buffer/line driver designed to be

employed as memory and address drivers, clock drivers

and bus oriented transmitter/receivers. The LCX541 is a

non inverting option of the LCX540.

This device is similar in function to the LCX244 while

providing flow-through architecture (inputs on opposite

side from outputs). This pinout arrangement makes this

device especially useful as an output port for micropro-

cessors, allowing ease of layout and greater PC board

density.

The LCX541 is designed for low voltage applications

with capability of interfacing to a 5V signal environment.

The LCX541 is fabricated with an advanced CMOS

technology to achieve high speed operation while

maintaining CMOS low power dissipation.

Ordering Information

Note:

2. DQFN package available in Tape and Reel only.

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

Order Number

Package

Number Package Description

74LCX541WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74LCX541SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LCX541BQX

(2)

MLP20B 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN),

JEDEC MO-241, 2.5 x 4.5mm

74LCX541MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

74LCX541MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,

4.4mm Wide

Implements p

roprietary

noise/ EMI reduction circuitry

December 2013

Summary of content (14 pages)

PAGE 1
74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs Features General Description ■ 5V tolerant input and outputs The LCX541 is an octal buffer/line driver designed to be employed as memory and address drivers, clock drivers and bus oriented transmitter/receivers. The LCX541 is a non inverting option of the LCX540. ■ 2.3V–3.6V VCC specifications provided ■ 6.5ns tPD max (VCC = 3.
PAGE 2
Logic Symbol Pin Assignments for SOIC, SOP, SSOP, TSSOP OE1 I0 I1 I2 I3 I4 I5 I6 I7 GND 1 20 2 19 3 18 4 17 5 16 6 7 15 14 8 13 9 12 10 11 IEEE/IEC VCC OE2 O0 O1 O2 O3 O4 O5 O6 O7 O0 O1 O2 O3 O4 O5 O6 O7 Truth Table OE1 VCC Inputs 20 I0 2 19 OE2 I1 3 18 O0 I2 4 17 O1 I3 5 16 O2 I4 6 15 O3 I5 7 14 O4 I6 8 13 O5 I7 9 12 O6 10 EN I0 I1 I2 I3 I4 I5 I6 I7 Pad Assignment for DQFN 1 & OE1 OE2 Outputs OE1 OE2 I On L L H H H X X Z X H X Z L L L L H
PAGE 3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Value Units Supply Voltage –0.5 to +7.0 V VI DC Input Voltage –0.5 to +7.0 V VO DC Output Voltage –0.
PAGE 4
TA = –40°C to +85°C Symbol VIH VIL VOH VOL Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage LOW Level Output Voltage II Input Leakage Current IOFF Power-Off Leakage Current ICC Quiescent Supply Current ∆ICC Increase in ICC per Input VCC (V) Conditions Min. 2.3–2.7 1.7 2.7–3.6 2.0 Max. V 2.3–2.7 0.7 2.7–3.6 0.8 2.3–3.6 IOH = –100µA Units V VCC – 0.2 2.3 IOH = –8mA 1.8 2.7 IOH = –12mA 2.2 3.0 IOH = –18mA 2.4 IOH = –24mA 2.
PAGE 5
TA = 25°C Symbol VOLP VOLV Parameter Quiet Output Dynamic Peak VOL Quiet Output Dynamic Valley VOL VCC (V) Conditions Typical Units V 3.3 CL = 50 pF, VIH = 3.3V, VIL = 0V 0.8 2.5 CL = 30 pF, VIH = 2.5V, VIL = 0V 0.6 3.3 CL = 50 pF, VIH = 3.3V, VIL = 0V –0.8 2.5 CL = 30 pF, VIH = 2.5V, VIL = 0V –0.6 Conditions Typical Units V Capacitance Symbol Parameter CIN Input Capacitance VCC = Open, VI = 0V or VCC 7 pF COUT Output Capacitance VCC = 3.
PAGE 6
VCC OPEN 500Ω TEST SIGNAL tPLH, tPHI tPZH, tPHZ tPZL, tPLZ GND DUT VI CL 500Ω Figure 1. AC Test Circuit (CL includes probe and jig capacitance) Test Switch tPLH, tPHL tPZL, tPLZ Open 6V at VCC = 3.3 ± 0.3V VCC x 2 at VCC = 2.5 ± 0.
PAGE 7
Input Stage P2 P1 VCC Data ESD P5 D2 N+/P– X1 VDD N1 N2 GTO™ Output Input Stage D6 N+/P– P4 P3 N5 Enable N4 ESD D4 N+/P– N3 ©2006 Fairchild Semiconductor Corporation 74LCX541 Rev. 1.6.1 www.fairchildsemi.
PAGE 8
Tape Format for DQFN Package Designator Tape Section Number Cavities Cavity Status Cover Tape Status BQX Leader (Start End) 125 (typ) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (typ) Empty Sealed Tape Dimensions inches (millimeters) Reel Dimensions inches (millimeters) Tape Size A B C D N W1 W2 12mm 13.0 (330.0) 0.059 (1.50) 0.512 (13.00) 0.795 (20.20) 2.165 (55.00) 0.488 (12.4) 0.724 (18.4) ©2006 Fairchild Semiconductor Corporation 74LCX541 Rev. 1.6.
PAGE 9
13.00 12.60 A 11.43 20 11 B 9.50 10.65 7.60 10.00 7.40 2.25 1 10 0.51 0.35 PIN ONE INDICATOR 0.25 M 0.65 1.27 1.27 C B A LAND PATTERN RECOMMENDATION 2.65 MAX SEE DETAIL A 0.33 0.20 C 0.75 0.25 X 45° SEATING PLANE NOTES: UNLESS OTHERWISE SPECIFIED (R0.10) GAGE PLANE (R0.10) 0.10 C 0.30 0.10 0.25 8° 0° A) THIS PACKAGE CONFORMS TO JEDEC MS-013, VARIATION AC, ISSUE E B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) CONFORMS TO ASME Y14.
PAGE 10
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs Physical Dimensions (Continued) Figure 4. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 11
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs Physical Dimensions (Continued) Figure 5. 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 12
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs Physical Dimensions (Continued) Figure 6. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 13
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs Physical Dimensions (Continued) Figure 7. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 14
TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.