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74LCX02 — Low Voltage Quad 2-Input NOR Gate with 5V Tolerant Inputs
©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX02 Rev. 1.6.0
January 2008
74LCX02
Low Voltage Quad 2-Input NOR Gate with 5V
Tolerant Inputs
Features
■
5V tolerant inputs
■
2.3V–3.6V V
CC
specifications provided
■
5.2ns t
PD
max. (V
CC
=
3.3V), 10µA I
CC
max.
■
Power down high impedance inputs and outputs
■
±24mA output drive (V
CC
=
3.0V)
■
■
Latch-up performance exceeds 500mA
■
ESD performance:
– Human body model
>
2000V
– Machine model
>
200V
General Description
The LCX02 contains four 2-input NOR gates. The inputs
tolerate voltages up to 7V allowing the interface of 5V
systems to 3V systems.
The 74LCX02 is fabricated with advanced CMOS tech-
nology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Pin Description
Logic Symbol
IEEE/IEC
Order Number
Package
Number Package Description
74LCX02M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX02SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX02MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
A
n
, B
n
Inputs
O
n
Outputs
Implements proprietary noise/EMI reduction circuitry

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