Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsLogic ICsLogic IC - Gate and inverter XOR gate 74AC TSSOP 14

September 1988

Revised February 2005

74AC86 Quad 2-Input Exclusive-OR Gate

74AC86

Quad 2-Input Exclusive-OR Gate

General Description

The AC86 contains four, 2-input exclusive-OR gates.

Features

■ I

reduced by 50%

■ Outputs source/sink 24 mA

Ordering Code:

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Connection Diagram Logic Symbol

IEEE/IEC

Pin Descriptions

FACT is a trademark of Fairchild Semiconductor Corporation.

Order Number Package Number Package Description

74AC86SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74AC86SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74AC86MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74AC86PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Pin Names Description

–A

Inputs

–B

Inputs

–O

Outputs

Summary of content (7 pages)

PAGE 1
Revised February 2005 74AC86 Quad 2-Input Exclusive-OR Gate General Description Features The AC86 contains four, 2-input exclusive-OR gates. ■ ICC reduced by 50% ■ Outputs source/sink 24 mA Ordering Code: Order Number 74AC86SC 74AC86SJ 74AC86MTC 74AC86PC Package Number Package Description M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.
PAGE 2
74AC86 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) Recommended Operating Conditions 0.5V to 7.0V DC Input Diode Current (IIK) VI 0.5V VI V CC 0.5V DC Input Voltage (VI) Supply Voltage (VCC) 20 mA 20 mA 0.5V to VCC 0.5V 0V to VCC Output Voltage (VO) 0V to VCC 40qC to 85qC Operating Temperature (TA) Minimum Input Edge Rate ('V/'t) DC Output Diode Current (IOK) 20 mA 20 mA VO DC Output Voltage (VO) 0.5V to VCC 0.5V r 50 mA DC Output Source or Sink Current (IO) VO 2.
PAGE 3
Symbol tPHL tPLH Parameter VCC TA 25qC (V) CL 50 pF (Note 5) Min Propagation Delay 3.3 Inputs to Outputs 5.0 Propagation Delay Inputs to Outputs 40qC to 85qC TA CL 40 pF Units Typ Max Min Max 2.0 6.0 11.5 1.5 12.5 1.5 4.5 8.5 1.0 9.5 3.3 2.0 6.5 11.5 1.5 12.5 5.0 1.5 4.5 8.5 1.0 9.0 ns ns Note 5: Voltage Range 3.3V is 3.3V r 0.3V Voltage Range 5.0V is 5.0V r 0.5V Capacitance Typ Units CIN Symbol Input Capacitance Parameter 4.
PAGE 4
74AC86 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.
PAGE 5
74AC86 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.
PAGE 6
74AC86 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 www.fairchildsemi.
PAGE 7
4AC86 Quad 2-Input Exclusive-OR Gate Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.