Datasheet

2N7002DW — N-Channel Enhancement Mode Field Effect Transistor
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com
2N7002DW Rev. A 2
Electrical Characteristics T
C
= 25°C unless otherwise noted
Off Characteristics (Note1)
On Characteristics (Note1)
Dynamic Characteristics
Switching Characteristics
Note1 : Short duration test pulse used to minimize self-heating effect.
Symbol Parameter Test Condition MIN TYP MAX Units
BV
DSS
Drain-Source Breakdown Voltage V
GS
= 0V, I
D
=10uA 60 78 - V
I
DSS
Zero Gate Voltage Drain Current V
DS
= 60V, V
GS
= 0V
V
DS
= 60V, V
GS
= 0V, @T
C
= 125°C
- 0.001
7
1.0
500
uA
I
GSS
Gate-Body Leakage V
GS
= ±20V, V
DS
= 0V - 0.2 ±10 nA
V
GS(th)
Gate Threshold Voltage V
DS
= V
GS
, I
D
= 250uA 1.0 1.76 2.0 V
R
DS(ON)
Satic Drain-Source On-Resistance V
GS
= 5V, I
D
= 0.05A,
V
GS
= 10V, I
D
= 0.5A, @Tj = 125°C
-
-
1.6
2.53
7.5
13.5
Ω
I
D(ON)
On-State Drain Current V
GS
= 10V, V
DS
= 7.5V 0.5 1.43 - A
g
FS
Forward Transconductance V
DS
= 10V, I
D
= 0.2A 80 356.5 - mS
C
iss
Input Capacitance
V
DS
= 25V, V
GS
= 0V, f = 1.0MHz
- 37.8 50 pF
C
oss
Output Capacitance - 12.4 25 pF
C
rss
Reverse Transfer Capacitance - 6.5 7.0 pF
t
D(ON)
Turn-On Delay Time V
DD
= 30V, I
D
= 0.2A, V
GEN
= 10V
R
L
= 150Ω, R
GEN
= 25Ω
- 5.85 20
ns
t
D(OFF)
Turn-Off Delay Time - 12.5 20