User guide
Understanding the Error Free Receiving in PCI® Express 3.0 128B/
130B Encoded Data Comparison
When RX detects incoming data correctly, the pattern looped back has the "same"
content except the length of the Skip Ordered Set (SKPOS) primitives. The change
in the SKPOS length by DUT is to compensate for the speed differences of the clock
domains. DUT/Slave receives SKP Ordered Set of 16 symbol and if clock
compensation is required, DUT must add or remove multiple of four skip symbols
per Skip Ordered Set. Hence received Skip Ordered Set can be 8, 12, 16, 20, or 24
Symbols. The SKP_END Symbol indicates the last four Symbols of SKP Ordered
Set. The three Symbols received after loopback following the SKP_END Symbol
can be different. Although bit-wise different in content and number of bits, in order
to report this different looped back bit stream as error free the ED has to recognize
the different length SKPOS and ignore these symbols.
The "Bit Comparison without PCIe3 SKPOS" option is only applicable for PCIe3
testing.
N O T E
PCIe3 is an abbreviation for PCI
®
Express 3.0 and is referred at several places in
this document.
"PCIe" and "PCI Express" are the registered trademarks of the PCI-SIG.
Understanding the Error Free Receiving in USB 3.1 128B/132B
Encoded Data Comparison
When RX detects incoming data correctly, the pattern looped back has the "same"
content except the length of the Skip Ordered Set (SKPOS) primitives. The change
in the SKPOS length by DUT is to compensate for the speed differences of the clock
domains. DUT/Slave receives SKP Ordered Set of 16 symbol and if clock
compensation is required, DUT must add or remove multiple of two skip symbols
per Skip Ordered Set. Hence received Skip Ordered Set can be 4, 6, 8, ... 40 Symbols.
The SKP_END Symbol indicates the last four Symbols of SKP Ordered Set. The
three Symbols received after loopback following the SKP_END Symbol can be
different. Although bit-wise different in content and number of bits, in order to
report this different looped back bit stream as error free the ED has to align with
EIEOS (Electrical Idle Exit Ordered Set) and recognize the different length SKPOS
and ignore these symbols. For recognition of these special symbols one bit error
correction is performed on header, SKP and SKP_END symbol each.
The "Bit Comparison without USB3.1 SKPOS" option is only applicable for USB 3.1
testing.
5 Setting up the Error Detector
184 Agilent J-BERT N4903B High-Performance Serial BERT