User guide

The following figure clarifies the behavior in the range between 615Mbit/s and
620 Mbit/s:
615 Bitrate [Mbit/s]
620
Limitations do not apply
in this range
Limitations apply
in this range
For the error detector the following rules apply:
• For low frequencies, you cannot use the automatic data alignment functions
(Auto Align and Data Center). Instead you need to align the error detector
manually. For instructions, please refer to the Online Help, go to the Error
Detector Setup section, select Sampling Point Setup, and switch to the
Procedures information.
• There are restrictions to the available sampling point delay values.
The error detector can vary the sampling point delay only within a range of 0ps
to 1.6129ns (relative to the clock signal). For frequencies above 620 Mbit/s,
this range is sufficient to cover the complete clock cycle (= 1 unit interval).
For lower frequencies, the maximum sampling point delay is smaller than the
clock cycle. Therefore, the sampling point cannot be set everywhere within the
clock cycle.
Clock 500 Mbit/s
Valid Range for
Sampling Point
2 ns
Valid Sampling Point
0 1.6129 ns
If you cannot find the optimum sampling point in the valid range of sampling
points, you can switch from the rising to the falling clock edge. For this purpose
activate the Clock Falling Edge checkbox on the Sampling Point Setup screen
of the error detector setup.
Clock 500 Mbit/s
Rising Edge
Sampling Point Delay
Falling Edge
Sampling Point Delay
2 ns
Covered Range
Setting up the Error Detector 5
Agilent J-BERT N4903B High-Performance Serial BERT 177