User`s manual
IPL T SF Series • Communication and Control
Figure 4-2 — equivalent digital input circuit
The Digital Input mode has two congurable options:
1. The ability to turn on an internal pull-up resistor to
+5 VDC (shown below as SW2)
2. Adjustable detection threshold voltages
The default threshold voltages follow standard TTL logic:
a voltage below 0.8 VDC is measured as logic low, and a voltage
above 2.0 VDC is measured as logic high. Using an adjustable
threshold, the integrator can select the proper high and low
voltages for the installation.
N
In the figure below, the SW2 switch is turned closed,
activating the +5 VDC and 2K pull-up resistor.
Figure 4-3 — Sample wiring for a digital input
reading an external pushbutton switch
If the integrator selects threshold voltages that are more than
0.1 V apart, a deadband, or hysteresis, will be established.
In the example below, the lower threshold voltage is set at
+6 VDC and the upper threshold is set at +16 VDC. The colored
bands show state changes on the logical outputs.
The range between 6-16 VDC is the deadband in which the
signal can uctuate without affecting the input state.
4-3
I/O
2K
+30V +5V
SW2
GND
24K
24K SW1
2K
+30V +5V
SW2
I/O
GND