User manual

Power and power management
Issue E 59
The PXA270 power consumption depends on the operating voltage and frequency,
peripherals enabled, external switching activity, external loading and other factors. The
tables below contain power consumption information at room temperature for several
operating modes: active, idle and low power. For active power consumption data, no
PXA270 peripherals are enabled except for on-chip UARTs.
Frequency
System bus
frequency
Active power
consumption typ.
Idle power
consumption typ.
Conditions
VCC_SRAM = 1.1V; VCC_PLL = 1.3V;VCC_MEM,
VCC_BB,
VCC_USIM, VCC_LCD = 1.8V;
VCC_IO, VCC_BATT,VCC_USB=3.0V
520MHz 208MHz 747 mW 222 mW VCC_CORE = 1.45V
416MHz 208MHz 570 mW 186 mW VCC_CORE = 1.35V
312MHz 208MHz 390 mW 154 mW VCC_CORE = 1.25V
312MHz 104MHz 375 mW 109 mW VCC_CORE = 1.1V
208MHz 208MHz 279 mW 129 mW VCC_CORE = 1.15V
104MHz 104MHz 116 mW 64 mW VCC_CORE = 0.9V
13MHz CCCR[CPDIS]=1 44.2 mW - VCC_CORE = 0.85V
PXA270 low power modes
Power
consumption typ.
Conditions
VCC_MEM, VCC_BB, VCC_USIM, VCC_LCD = 1.8V
VCC_IO, VCC_BATT, VCC_USB= 3.0V
13MHz idle mode (LCD on) 15.4mW VCC_CORE, VCC_SRAM, VCC_PLL = 0.85V
13MHz idle mode (LCD off) 8.5mW VCC_CORE, VCC_SRAM, VCC_PLL = 0.85V
Deep sleep mode 0.1mW VCC_CORE, VCC_SRAM, VCC_PLL = 0V
Sleep mode 0.16mW VCC_CORE, VCC_SRAM, VCC_PLL = 0V
Standby mode 1.7mW VCC_CORE, VCC_SRAM, VCC_PLL = 3.0V
Wake-up sources
The PXA270 offers two sleep modes:
• Sleep mode offers lower power consumption by switching off most internal units. There
is no activity inside the processor, except for the units programmed to retain their state
in the PSLR register, the real time clock and the clocks and power manager. Because
internal activity has stopped, recovery from sleep mode must occur through an external
or internal real time clock event. External wake-up sources are GPIO<n> edge detects
(they are listed in the section PXA270 GPIO pin assignments
, page 22).
• Deep-sleep mode offers the lowest power consumption by powering most units off.
There is no activity inside the processor, except for the real time clock (RTC) and the
clocks and power manager. Because internal activity has stopped, recovery from deep-
sleep mode must be through an external event or an RTC event. In deep-sleep mode,
all the PXA270 power supplies (VCC_CORE, VCC_SRAM, VCC_PLL, VCC_IO
excluding VCC_BATT) are powered off for minimized power consumption. On the
ZEUS, the main +3.3V rail supplies the VCC_IO power domain of the PXA270. Since
the +3.3V supply is switched off in deep-sleep mode, all the on-board peripherals are
powered off and it is not possible to use external wake-up sources. In this situation,
recovery from deep-sleep mode must be through an internal RTC event.
For more information on PXA270 power management, see section 3.6 in the Intel
PXA27x Processor Family Developer’s Manual, included on the Development Kit CD.