User manual

ZEUS user manual
Issue E
54
Quick Capture camera interface
The Quick Capture camera interface is a component of Intel Quick Capture technology
which provides a connection between the PXA270 processor and a camera image
sensor. The Quick Capture interface is designed to work primarily with CMOS-type image
sensors and supports up to 4 Megapixel resolution. However, it may be possible to
connect some CCD-type image sensors to the PXA27x processor (PXA27x processor),
depending on a specific CCD sensor’s interface requirements.
The Quick Capture interface acquires data and control signals from the image sensor,
and performs the appropriate data formatting prior to routing the data to memory, using
direct memory access (DMA). A broad range of interface and signalling options provides
direct connection. The image sensor can provide raw data through a variety of parallel
and serial formats. For sensors that provide pre-processing capabilities, the Quick
Capture interface supports several formats for RGB and YCbCr colour space.
The Quick Capture interface signals are connected to the header J9. The I
2
C interface is
available on the same header since most of the camera image sensors require an I
2
C
control interface. For I
2
C bus address map on the ZEUS, see the section I²C bus on the
previous page. For connector details, see the section J9 – Camera interface connector
,
page 74
.
External General purpose I/O
A Maxim MAX7313 I²C I/O Expander provides sixteen general purpose input/output lines
on the header J7. Each I/O port can be individually configured as either an open-drain
current-sinking output rated at 50mA with10K pull-up to 5V, or a logic input with transition
detection. The I/O Expander inputs are 5V tolerant.
The I/O Expander is addressable at I²C serial bus address 0x20 and is accessed in fast-
mode operation at 400 kbps. On power-up all control registers are reset and the
MAX7313 enters standby mode. Power-up status makes all ports into inputs, so the state
of all 17 ports (P0-P16) is logic high (through 10K pull-up to 5V).
See the section J7 – GPIO connector
, page 73, for connector pinout and mating
connector details. The signals on J7 correspond to the pin names of the MAX7313
(P0-P15).
10K
+5V
P(0-15)
PXA270 MAX7313
I2C
J7
P16
Port 16 of the MAX7313 is configured as an interrupt, so that any I/O Expander GPIO pin
configured as an input can cause the PXA270 to be interrupted on GPIO1. These can
also be used as PXA270 wake-up sources from sleep mode.