User manual

Detailed hardware description
Issue E 43
LCD logic and backlight power
The display signals are +3.3V compatible. The ZEUS contains power control circuitry for
the flat panel logic supply and backlight supply. The flat panel logic is supplied with a
switched 3.3V (default) or 5V supply (for details see the section JP3 – LCD logic supply
selection
, page 86). The backlight is supplied with a switched 5V supply for the inverter.
The power switches (TPS2033D) for flat panel logic and backlight have the current-
limiting (1.5A) and thermal protection features which eliminates the need for the fuses.
The PXA270 GPIO101 pin (LCDEN signal) controls the supply voltage to the LCD
display.
LCDEN
(CPU_GPIO101) Selected LCD function
0 LCD power off (default)
1 LCD power On
The PXA270 GPIO19 pin (BKLEN signal) controls the supply voltage to the backlight
inverter:
BKLEN
(CPU_GPIO19) Selected backlight function
0 BKLSAFE Power Off (Default)
1 BKLSAFE 5V Power On
The BKLEN signal is also routed to the connector J14. See the section J14 – LCD
connector
, page 77, for J14 pin assignment and connector details.
Signals BKLEN and BKLSAFE are also routed to the connector J24. See the section J24
– Backlight power
, page 84, for further details.
Typically the power up sequence is as follows (please check the datasheet for the
particular panel in use):
1 Enable display power.
2 Enable flat panel interface.
3 Enable backlight.
Power down is in reverse order.