User manual

ZEUS user manual
Issue E
22
PXA270 GPIO pin assignments
The table below summarizes the use of the 118 PXA270 GPIO pins, their direction,
alternate function and active level.
Key:
AF Alternate function.
Dir Pin direction.
Active Function active level or edge.
For details of pin states during sleep modes and reset see the Pin Usage table in
the Intel PXA27x Processor Family Electrical, Mechanical and Thermal
Specification.
GPIO
No AF Signal name Dir Active Function
Wake-up
source See section…
0 0 AC97_IRQ Input AC97Interrupt
3
Audio
, page 45
1 0 DS_WAKEUP Input
Reset in case of power
failure
3
3 0 PWR_SCL Output
4 0 PWR_SDA Bidir.
PXA270 Power
Manager I
2
C
Power
management IC
,
page 57
5 N/A PWR_CAP0 Power
6 N/A PWR_CAP1 Power
7 N/A PWR_CAP2 Power
8 N/A PWR_CAP3 Power
Dedicated function - To
achieve low power
during sleep
N/A
9 0 UART_INTA Input UART 1 Interrupt
3
10 0 UART_INTB Input UART 2 Interrupt
3
11 0 UART_INTD Input UART 4 Interrupt
3
12 0 UART_INTC Input UART 3 Interrupt
3
Serial COM ports
,
page 47
13 0 USER_LINK1 Input User configurable Input
3
JP1 – User
jumpers
, page 85
continued…