Datasheet

VIPER / VIPER-Lite Embedded Linux Development Kit Quickstart Arcom Embedded Linux (AEL)
Parameter Description Default
pixclock
The pixel clock, expressed in picoseconds (10
-12
s).
This value is used in conjunction with the current
memory clock rate to calculate LCCR3[PCD].
pixclock:157500
left, right,
hsynclen,
upper,
lower and
vsynclen
The timing parameters. All parameters are given as
a number of pixel clock ticks. The upper and lower
margins should be 0 for passive (STN) displays.
The values correspond to LCCR as follows:
•
•
•
•
•
•
‘left’ corresponds to LCCR1[BLW] + 1.
‘right’ corresponds to LCCR1[ELW] + 1.
‘hsynclen’ corresponds to LCCR1[HSW] + 1.
‘upper’ corresponds to LCCR2[BFW].
‘lower’ corresponds to LCCR2[EFR].
‘vsynclen’ corresponds to LCCR2[VSW] + 1.
Several of these values are modified by + 1 because
the hardware expects the desired value – 1 to be
programmed. The values given to this parameter
therefore correspond to the desired value rather than
the value programmed into the hardware.
left:7,
right:13,
hsynclen:63,
upper:1,
lower:1,
vsynclen:20.
color or
mono
Configures the LCD controller for color or
monochrome panels. These parameters correspond
to the LCCR0[CMS] register.
color
active or
passive
Configures the LCD controller for active (TFT) or
passive (STN) displays. These parameters
correspond to the LCCR0[PAS] register.
active
single or
dual
In passive mode configures the LCD controller for
either single or dual panel displays. These
parameters correspond to the LCCR0[SDS] register.
N/A
4pix or
8pix
In monochrome passive mode configures the LCD
controller for either 4- or 8-pixel mode. These
parameters correspond to the LCCR0[DPD] register.
N/A
hsync and
vsync
Configures the polarity of the horizontal and
vertical sync pulses. A value of 0 indicates an
active low sync pulse, while 1 indicates active high.
These parameters correspond to the LCCR3[HSP]
and LCCR3[VSP] registers.
hsync:0,vsync:0
continued…
© 2006 Arcom Issue B 26