Datasheet

31 Soft Power Management Registers

SuperIO National PC87364

The following tables show the National Super I/O PC87364 registers useful for the power management:

Access to the Super I/O configuration registers is via an Index-Data register pair, using only two system I/O

byte locations. The base address of this register pair is determined during reset, according to the state of the

hardware strapping option on the BADDR pin. The following table shows the selected base addresses as a

function of BADDR.

BADDR

Index

Data

0 2Eh 2Fh

1 4Eh 4Fh

Table 14. BADDR Strapping Options

For a more detailed description please refer to National / Winbond PC87364 128-Pin LPC Super I/O

datasheet.

An0065. CPU-1450 Soft Power Management