User`s manual

Am186™CC Microcontroller Router Reference Design User’s Manual
2-26
The S/T or U transceiver provides the clock and frame sync for the PCM interface
and transfers data between the ISDN interface and the POTS interface. MCLK is
the master clock used to drive the DSLAC device’s internal DSP. MCLK must be
2.048 MHz or 4.096 MHz and must be synchronous to the DSLAC’s PCLK. The
MCLK input is derived from whichever ISDN transceiver is being used as the
upstream ISDN device. If the U interface is selected using the T7237A as the clock
master, MCLK is derived directly from the 2.048-MHz CLKA output from the
T7237A. If the S/T interface is selected, PCLK_DSLAC is derived from the output
of PLD U43 (at location E-5) which synchronizes the DSLAC MCLK input and
the DSLAC PCLK input. See the Am79C32A DSC and DSLAC synchronization
application note included in your kit for details.
The Am186CC microcontroller SSI interfaces to the DSLAC device’s
microprocessor interface for programming and control of the DSLAC device. The
default configuration uses PIO17 for the SSI enable for POTS channel 1, and the
SDEN signal is used for the SSI enable for POTS channel 2. This allows the two
channels to be individually configured. An optional configuration allows the two
DSLAC channels to be identically programmed by using SDEN as the SSI enable
for both channels. This is achieved by populating R42 (at location C-5) and
configuring PIO17 as an input.
Because the Am186CC microcontroller and the Am79C031 DSLAC are both
downstream from the ISDN controller, the PCM/GCI data is driven from the ISDN
device transmit pin (TXD) to the Am186CC microcontroller and the DSLAC
receive pins (RXD) and vice-versa. See sheet 14 of the schematics for a diagram.
The Am186CC Transmit pin is connected to the DSLAC Transmit pin and the
Am186CC Receive pin is connected to the DSLAC Receive pin. This configuration
causes a problem when the Am186CC microcontroller needs to communicate
directly with the DSLAC device on the PCM bus (for example, for PABX
applications).
To solve this problem, the Am186CC microcontroller router reference design has
logic to use the Am186CC microcontroller HDLC interface D to transmit directly
to the DSLAC device on the PCM bus. This is achieved by using the Am186CC
microcontroller PCM time-slot control (TSCD) pin and the DSLAC device time-
slot control (TSC) to transmit only PCM data on the appropriate time slot. U48B
(at location E-5) and U48C provide three-state buffer control (see sheet 14 of the
schematics). Table 2-4 on page 2-5 shows resistor configuration options.
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