Service manual

Schematic Diagrams
Processor 7/7 B - 9
B.Schematic Diagrams
Processor 7/7
Sheet 8 of 57
Processor 7/7
R ESERVED
U34E
MOLEX 479890142
CFG[0]
AM30
CFG[1]
AM28
CFG[2]
AP31
CFG[3]
AL32
CFG[4]
AL30
CFG[5]
AM31
CFG[6]
AN29
CFG[7]
AM32
CFG[8]
AK32
CFG[9]
AK31
CFG[10]
AK28
CFG[11]
AJ28
CFG[12]
AN30
CFG[13]
AN32
CFG[14]
AJ32
CFG[15]
AJ29
CFG[16]
AJ30
CFG[17]
AK30
R SVD 3 4
AH 2 5
R SVD 3 5
AK 26
R SVD 3 8
AJ 2 6
RSVD_NC TF_42
AT3
R SVD 3 9
AJ 2 7
RSVD_NC TF_40
AP 1
RSVD_NC TF_41
AT2
RSVD_NC TF_43
AR 1
RSVD_TP _86
H16
R SVD 4 5
AL2 8
R SVD 4 6
AL2 9
R SVD 4 7
AP 30
R SVD 4 8
AP 32
R SVD 4 9
AL2 7
R SVD 5 0
AT3 1
R SVD 5 1
AT3 2
R SVD 5 2
AP 33
R SVD 5 3
AR 3 3
RSVD_NC TF_54
AT3 3
RSVD_NC TF_55
AT3 4
RSVD_NC TF_56
AP 35
RSVD_NC TF_57
AR 3 5
R SVD 5 8
AR 3 2
RSVD_NCTF_30
C35
RSVD_NCTF_31
B35
RSVD_NCTF_28
A34
RSVD_NCTF_29
A33
RSVD27
J28
RSVD26
J29
RSVD16
A19
RSVD15
B19
RSVD17
A20
RSVD18
B20
RSVD20
T9
RSVD19
U9
RSVD22
AB9
RSVD21
AC9
RSVD_NCTF_23
C1
RSVD_NCTF_24
A3
R SVD _ TP_ 6 6
AA 5
R SVD _ TP_ 6 7
AA 4
R SVD _ TP_ 6 8
R8
R SVD _ TP_ 7 1
AA 2
R SVD _ TP_ 7 2
AA 1
R SVD _ TP_ 7 3
R9
R SVD _ TP_ 6 9
AD 3
R SVD _ TP_ 7 4
AG7
R SVD _ TP_ 7 0
AD 2
R SVD _ TP_ 7 5
AE 3
R SVD _ TP_ 7 6
V4
R SVD _ TP_ 7 7
V5
R SVD _ TP_ 7 8
N2
R SVD _ TP_ 8 1
W3
R SVD _ TP_ 8 2
W2
R SVD _ TP_ 8 3
N3
R SVD _ TP_ 7 9
AD 5
R SVD _ TP_ 8 4
AE 5
R SVD _ TP_ 8 0
AD 7
R SVD _ TP_ 8 5
AD 9
R SVD 3 6
AL2 6
RSVD_NC TF_37
AR 2
RSVD1
AP25
RSVD2
AL25
RSVD3
AL24
RSVD4
AL22
RSVD5
AJ33
RSVD6
AG9
RSVD7
M27
RSVD8
L28
RSVD9
J17
RSVD10
H17
RSVD11
G25
RSVD12
G17
RSVD13
E31
RSVD14
E30
R SVD 3 2
AJ 1 3
R SVD 3 3
AJ 1 2
R SVD _ TP_ 5 9
E15
R SVD _ TP_ 6 0
F15
KEY
A2
R SVD 6 2
D15
R SVD 6 3
C15
R SVD 6 4
AJ 1 5
R SVD 6 5
AH 1 5
VSS
AP 34
CFG3 - PCI-Express Static Lane Reversal
PROCESSOR 7/7 ( RESERVED )
R427 * 0_04
1 : Normal Operation
0 : Lane Numbers Reversed
15 -> 0, 14 -> 1, ...
R130 *0_04R393 * 3.01K_1%_ 0 4
TP_RSVD86
R428 * 0_04
CFG3
DRAMR ST _ CNTRL3
DRAMR ST _ CNTRL3
CF G7
Cl ar ksf iel d (on ly fo r e ar ly sa mpl es
pr e- ES1 ) - C onn ec t t o G ND wi th 3. 01K O hm/ 5%
re si sto r
CFG3
CFG4
R319 *0_04
D04 add C694,C695
CFG4
CFG3
CFG0
CFG7
CFG7 R3 90 *3.01K_1%_04
Q36
AO3402L
G
D S
C695
47n_10V _X7 R _ 0 4
Q37
AO3402L
G
D S
H_RSV D17_R
H_RSV D18_R
Clarksfield (only for early samples
pr e- E S1 ) - Co nn e ct to G N D w it h 3 .0 1 K
Ohm/5% resistor
CFG7
CFG7 - Reserved - Temporarily used for
early Clarksfield samples.
For a common motherboard design (for
AUB and CFD), the pull-down resistor
should be used. Does not impact AUB
fu nc t io n al i ty .
No te : O n ly te mp o ra r y fo r e a rl y C FD
sa mp l es (r P GA /B G A) [F or de t ai l s
please refer to the WW33 MoW and
sighting report].
MVREF _ DQ_DIM09
MVREF _ DQ_DIM110
RSVD65_R
RSVD64_R
C694
47n_10V _X7 R _ 0 4
D03C
RSVD86
CFG0
D03
RSVD86
Connect
to GND
R563
100K _04
R564
100K _04
VSS (AP34) can be left NC is
CRB implementation ; EDS/DG
recommendation to GND
PCI-Express Configuration Sele ct
R326 * 0_04
CFG4 - Display Port Presence
VR EF _ C H_A_DI MM
1 : Single PEG
0 : Bifurcation enable
VR EF _ C H_B_DI MM
R394 * 3.01K_1%_ 0 4
CFG0
R127 * 0_04
R138 * 0_04
1 : Disablled; No physical Display Port
attached to Embedded Display Port
0 : Enabled; An external Display Port
device is connected to the Embedded
isplay Port
R389 * 3.01K_1%_ 0 4
CFG4