Service manual
Schematic Diagrams
PCH 3/8 DMI, PWRGD B - 15
B.Schematic Diagrams
PCH 3/8 DMI, PWRGD
PM _ MPWR OK
SUS_PWR_DN_ACK is Active-high and
is driven low by the Intel ME when
it requires the PCH Suspend Well to
be powered.
SUS_PWR _ACK_R
FDI_FSY NC 0_R
The ACPRESENT pin is used by
EC to indicate to the Intel
ME the current power source
of the system.
AC_PR ESENT_R
GP IO29 /
PCIE_ W A KE#
1.1VS_1.5V_P WRO K
PM_BATL OW#
H_PM_SYNC 3
SUS_PW R _ACK_R
A ub ur nd al e Gr ap hi cs Di sa bl e Gu id el in e
In addition, FDI_RXN_[7:0] and FDI_RXP_[7:0] can be left
floating on the PCH.
FDI_TX[7:0] and FDI_TX#[7:0] can be left floating on the
Auburndale
T he G FX _I MO N, F DI _F SYN C[ 0] , FD I_ FS YN C[ 1] , FD I_ LS YN C[ 0] ,
FDI_LSYNC[1], and
FDI_INT signals should be tied to GND (through 1K ? %
resistors) in the common
motherboard design case. Please not that if these signals
are left floating, there are no
functional impacts but a small amount of power (~15 mW)
maybe wasted. VAXG_SENSE
a
nd VSSAXG
_
SE NS E on Au bu rn da le c an b e le ft a s no c on ne ct.
FOR RESET SWITCH (? ? ? )
SB _PW RO K
P M _S LP _ L A N #
IBEXPEAK - M (DMI,FDI,GPIO)
PW R_BTN #
S4_ STATE# 22
SU SB# 20, 28,31,34,36
PM _CL KRU N# 2 2
PM_MPW ROK
SU SC# 31,34,37
ALL_SY S_PW R GD 10,11,21, 22,24
H_VTTPW R GD 3
DMI_TXP32
1.1VS_VTT_ EN 3 6
DMI_TXP12
PM _D RA M_PW R GD3
DMI_TXN12
DMI_TXN22
FDI_LSYN C1_ R
DMI_TXP22
DMI_TXP02
DMI_TXN02
SUS_PW R_ ACK31
DMI_TXN32
PCIE_ W A KE#
FDI_FSY NC 1_R
R415 10K_04
R158 10K_04
U7 C
74LVC 08P W
9
10
8
147
RN 7
*1K_8P4R_04
81
72
6
5
3
4
R1 1 0
10K _04
R17 7 * 1K _0 4
U7D
74LV C08PW
12
13
11
147
Q3 7
*M TN7002ZH S3
G
DS
R173 10K _04
R4 1 8
10K _04
R135 10K_04
R 414 *10K_04
R435 10K_04
U7B
74LVC08 PW
4
5
6
147
R184 49.9_1% _04
DM I
FD I
System Power Management
U14C
IBEXPEAK -M
DM I0R XN
BC 24
DM I1R XN
BJ 22
DM I2R XN
AW 20
DM I3R XN
BJ 20
DM I0R XP
BD 24
DM I1R XP
BG 22
DM I2R XP
BA20
DM I3R XP
BG 20
DM I0TXN
BE22
DM I1TXN
BF21
DM I2TXN
BD 20
DM I3TXN
BE18
DM I0TXP
BD 22
DM I1TXP
BH 21
DM I2TXP
BC 20
DM I3TXP
BD 18
DM I_Z CO MP
BH 25
DM I_I RC OMP
BF25
FD I_RXN 0
BA18
FD I_RXN 1
BH17
FD I_RXN 2
BD16
FD I_RXN 3
BJ16
FD I_RXN 4
BA16
FD I_RXN 5
BE14
FD I_RXN 6
BA14
FD I_RXN 7
BC12
FDI_R XP 0
BB18
FDI_R XP 1
BF17
FDI_R XP 2
BC16
FDI_R XP 3
BG1 6
FDI_R XP 4
AW 16
FDI_R XP 5
BD14
FDI_R XP 6
BB14
FDI_R XP 7
BD12
FDI_FSYNC0
BF13
FDI_FSYNC1
BH13
FDI_LSY NC 0
BJ12
FDI_LSY NC 1
BG1 4
FDI_ IN T
BJ14
PMSY NC H
BJ10
TP23
N2
SLP_M #
K8
SLP_ S3#
P12
SLP_ S4#
H7
SLP_ S5# / GPIO 6 3
E4
SYS_R ESET#
T6
SYS_PW ROK
M6
PW RB TN #
P5
RI#
F14
WAKE #
J1 2
SU S_STAT# / GPIO 6 1
P8
SU SC LK / GPIO 62
F3
ACPR ESEN T / GPIO 31
P7
LA N _ R S T #
A10
ME P W RO K
K5
BATLO W # / G PIO72
A6
PW RO K
B17
CL KR UN # / GPIO 3 2
Y1
SUS_PW R_ACK / GPIO 3 0
M1
RSM RST #
C16
DR AMPW RO K
D9
SLP_ LAN #
F6
U7A
74LV C08PW
1
2
3
147
R 4 00 * 1 0 K _0 4
R165 10K _04
R438 10K_04
1.5VS_PWRG D38
1.1VS_VTT_PW RG D3, 3 6
DDR1.5V_PW RGD37
R126 8.2K_04
R105
1K_04
DEL AY _PW RG D3,35
RS MR ST#31
DMI_RXN32
1. 8V S _P W R G D38
R125 0_04
DMI_RXN12
DMI_RXN02
PC IE_W AKE# 28,29
R108 2K_04
SW I#31
DMI_RXP02
DMI_RXN22
AC_IN #31,40
DMI_RXP12
DMI_RXP32
C159
0.1u_16V_Y5V_04
DMI_RXP22
INTEL? ? ? ? EC
SY S_ PW R OK
FDI_ IN T_ R
AC _P RESEN T_R
S YS_PW R OK
1.1VS_VTT 3,5,6,12,13,17..20,35,36
3.3V 2,3,12,13,16, 17,19,22,25,28,29,35..39
3 .3 VS 3,8 ..1 2, 16 ..2 4 ,2 6.. 35
PWR_BTN#31
ALL_SYS_PWR GD
AUXPPW R OK_R
FO R TP M
SW I#
SB_PWROK
398905 DG1.5:
4 mil width and place
within 500 mil of PCH
DM I_ CO MP_ R
1.1VS_VTT
3.3VS
3.3V
3.3VS
3.3V 3.3V3. 3 V
3.3V
3.3V
3.3V
PW R_BTN#
PM_BATL OW#
SW I#
R 111 * 20m il_P_04
R 114 * 20m il_P_04
R 113 * 20m il_P_04
ALL_S YS_PWR GD
FDI_LSYN C0_ R
Sheet 14 of 55
PCH 3/8
DMI, PWRGD