Service manual

Schematic Diagrams
B - 4 Processor 2/7 CLK, MISC
B.Schematic Diagrams
Processor 2/7 CLK, MISC
R509 0_04
R490
*1.5K_1%_04
PROCESSOR 2/7 ( CLK,MISC,JTAG )
DDR3 Compensation Signals
Processor Compensation Signals
Processor Pullups
XDP_PREQ #
XDP_PRD Y#
I f P RO CH OT # is no t us ed, t he n it mu st b e ter mi na te d
w ith a 5 0- O pul l- up r esi st or t o VTT _1 .1 r ail .
FO R X DP
XDP_TDO_ M
H_CPURST#
Q4 3
MTN7002ZH S3
G
DS
1.5VS_CP U 6,34
1. 5 V
H _ PRO CHO T#_ D
H_ DB R#_R
R512
*1 K_ 04
H_PECI17
H_ P M_SY NC14
XD P _ TD I _ M
XDP _TR ST#
R488 0_04
D RAM RST_ CN TR L 7
CPUDRAMRST#
R383 *10m il_04
R 382 *51_04
XDP _TD O_M
H_ CP URS T#
H_ CO MP3
H_ CO MP2
H_ CO MP1
H_ CO MP0
R490? ? ? ? , R103=750_1%_04
R490?? ?? , R103=3K_1%_04
Q4 4
*MT N 70 0 2 Z HS 3
G
DS
H_THR MTRIP#17
H_PROCHOT#35
R494
* 10K_04
XDP _TM S
3.3V
3.3V
R 384 *51_04
R103
3K_1%_04
R 102 49.9_1% _04
R374
10K_04
R388 *1K_04
R 37 1 2 0 _1 % _ 04
R 369 * 68_04
1.5VS_CPU
R394 *0_04
R109
750_1%_04
R377
1.1K_1% _04
R112
*12.4K_1%_04
R361 100_1%_04
R 368 *51_04
R 392 0_04
R 59 49.9_1%_04
R360 24.9_1% _04
R 365 *51_04
R395 0_04
R375
10K_04
R 366 *51_04
R 387 0_04
CLOCKS
MISC THERMAL
PWR MANAGEMENT
DDR3 MISC
JTAG & BPM
U38B
M OLEX 47989-0132
SM _RCO MP[ 1]
AM1
SM _RCO MP[ 2]
AN1
SM_DR AMR ST#
F6
SM _RCO MP[ 0]
AL1
BC LK #
B16
BCLK
A16
BCLK_ITP #
AT30
BC LK_ITP
AR30
PEG _C LK #
D1 6
PEG_CLK
E16
DPLL_REF_SSC LK #
A17
DPLL_R EF_SSCLK
A18
CAT E R R#
AK14
CO MP3
AT2 3
PEC I
AT1 5
PRO CH OT#
AN26
THER MTRIP#
AK15
RES ET_ O BS#
AP26
VCC PW R GOO D_1
AN14
VCC PW R GOO D_0
AN27
SM_D RAM PW RO K
AK13
VTTP WRGOOD
AM1 5
RST IN #
AL1 4
PM _EXT_TS#[ 0]
AN15
PM _EXT_TS#[ 1]
AP15
PR DY #
AT28
PREQ#
AP27
TCK
AN28
TMS
AP28
TR S T #
AT27
TDI
AT29
TD O
AR27
TDI_M
AR29
TD O_M
AP29
DBR #
AN25
BPM #[ 0]
AJ22
BPM #[ 1]
AK22
BPM #[ 2]
AK24
BPM #[ 3]
AJ24
BPM #[ 4]
AJ25
BPM #[ 5]
AH22
BPM #[ 6]
AK23
BPM #[ 7]
AH23
CO MP2
AT2 4
PM_SY NC
AL1 5
TAPPW R GOO D
AM2 6
CO MP1
G1 6
CO MP0
AT2 6
SKTOC C#
AH24
R 367 51_04
R 391 0_04
R 386 49.9_1% _04
R376 1.5K_1%_04
R359 130_1%_04
R 37 2 2 0 _1 % _ 04
R393 0_04
R 385 *51_04
R370 68_04
D DR3 _ DR AMR ST# 8,9
PM_EXTTS #[0]
R 492 * 0_04
D RAM RST_ CN TR L_ PC H 1 7
U43
* 74AH C1G08GW
1
2
5
4
3
DR AMPWR GD _ CPU
VDDPWRGOOD_R
DRAMPWRGD_CPU
Q45
* 2N 3904
B
E C
H _ PRO CHO T#_ D
1.1VS_VTT 5,6,12..14,17..20,35,36
H_ CPU PW R GD17
CLK_ EXP_P 13
D EL AY_ PW R GD14,35
H_VTTPWR GD14
PM _DR AM_ PW R GD14
3 .3 VS 8..1 2 ,14 ,1 6 ..2 4,2 6 ..3 5
BUF_PLT_R ST#16,20,28..31
BCLK_CPU _P 17
CLK_ EXP_N 13
BCLK_CPU _N 17
PM_EXTTS#_E C 2
1.5V 8,9,19,37
3.3V 2,12..14,16,17,19,22,25,28,29,35..39
TS#_DIM M0_1 8,9
PLT_RST#_R
1.1VS_VTT_P W RG D14,36
H _PW RG D_XDP
BCLK_ITP_P
XDP_OBS0_ R
S3 Power Reduction white paper
CLK_DP_P R 507 0_04
XDP_TCLK
PM_EXTTS #[1]
XDP_TRST#
CLK_DP_N
XDP_TMS
R 508 0_04
R491
*100K_04
H_COMP3
SY S_AGEN T_PW ROK
XDP_OBS1_ R
H_COMP2
XDP_OBS2_ R
H_COMP1
XDP_OBS3_ R
XDP_OBS4_ R
1.5S_C PU_PWR GD 37
398905 DG1.5:
1 0m il wi de , <50 0m il l eng th o r
2 0m il wi de , 500 mi l< le ngt h< 10 0m il
keep 20mil spacing
BCLK_ITP_N
CPUDRAMRST#
XDP_OBS5_ R
XDP _TD O_R
SM_R COM P_0
XDP_OBS6_ R
XDP_OBS7_ R
SM_R COM P_1
XDP _TD I_R
R489
*1 K_ 04
VDD PW R GOO D_ R
3
SM_R COM P_2
H _ CATERR #
XDP _PR EQ#
XDP _TC LK
XDP_TDI_R
C5 8 1
*470P_50V_X7R_04
XDP_TDO_ R
H_COMP0
XDP_TDI_M
3
5 6
S3 Power Reduction white paper
1.5VS_CPU
1.1VS_VTT
1.1VS_V TT
1.1VS_ VTT 1.1VS_VTT
3.3VS
3.3V
C580 *0.1u_10V_X7R _04
R493
*10K_04
SM _RCO MP_0
SM _RCO MP_1
SM _RCO MP_2
H _ CAT ERR #
Zo= 50 O? 5%
Sheet 3 of 55
Processor 2/7
CLK, MISC