Service manual

Schematic Diagrams
V1.0 Power_SEQ S3 B - 53
B.Schematic Diagrams
V1.0 Power_SEQ S3
Sheet 52 of 55
V1.0 Power_SEQ
S3
SUSB#
VCORE
6ms
590us(t17)
4.144ms(Tj)
1.520ms
A
LL
_
SYS
_
PWRGD
110ms(t16)
116ms(t21)
MEPWROK
3.3VS
>5us,PASS
X8100 V1.0 POWER SEQUENCE S3 AND WAKE-UP
>40ns,PASS
SYS_PWROK
Bios: 1.00.E1
EC: 1.00.E1b-TEST
T
est date: 2009/7/21
VCORE_ON
140us(t29)
SUS_STATE#
VCCPWRGOOD
S3 Sleep SEQ S3 Wakeup SEQ
1.64ms(t28)
400us(Tm)
400us
PLTRST#
1.78ms(t32)
60us(Tn)
>0ms,PASS
>40ns,PASS
<100ns,FAIL
>60us,PASS
0.01~10ms,PASS
>30us,PASS
>1ms,PASS
>1ms,PASS
<3ms,PASS
>5ms,PASS
>99ms,PASS
1.1VS
32us(Te)
470us(Tc)
3.984ms(Ti)
4.4ms(Th)
118ms
2.016ms
114.8ms